MPC8347VRADDB - PowerQUICC II Pro SoC, 266MHz, 620-HBGA | NXP
MPN: MPC8347VRADDB ⚠ Last Time BuyMPC8347VRADDB Overview
An embedded microprocessor / microprocessor unit (MPU) is a self-contained processing subsystem in which the CPU, memory controller, peripheral controllers, and I/O interfaces are integrated onto a single die. The MPC8347 sits at the upper tier of NXP's PowerQUICC II Pro family, targeting wired networking, industrial control, and secure communications designs where deterministic performance and rich I/O integration reduce system bill of materials.
Key features include a 266 MHz e300 core with 32 KB instruction and 32 KB data L1 caches, a 266 MHz 64-bit DDR1/DDR2 memory controller with ECC, a 32-bit/66 MHz PCI interface, a 1 Gbit/sec Ethernet MAC, USB 2.0 host/device, four UARTs, two I2C, dual SPI, and an integrated security engine (SEC 2.0) for IPSec, SSL/TLS, and 3DES/AES/SHA acceleration. Local bus and GPIO further expand peripheral options.
Technically, the device is fabricated in a 0.13 µm CMOS process and uses a 32-bit Power Architecture Book-E compliant core. It exposes a 60x bus interface, supports JTAG 1149.1 boundary scan, and provides hardware MMU with 16-entry TLB. The HBGA package provides the thermal dissipation needed for the device's typical 1.1 V core / 3.3 V I/O dual-supply operation.
Typical applications include industrial Ethernet switches and routers, secure VPN gateways, wireless base-station controllers, factory-automation controllers, and point-of-sale terminals. This part specifically (no security engine suffix in the order code per datasheet naming) suits designs that need the SoC I/O integration but rely on an external security coprocessor.
When designing in the MPC8347VRADDB, allocate generous PCB area for the 620-ball HBGA footprint, use a 6-8 layer stackup with dedicated power planes for the 1.1 V core and 3.3 V I/O rails, and follow NXP application note AN3889 for DDR2 layout and signal-integrity validation.
This page synthesizes distributor stock and price tiers, drop-in same-package alternatives drawn from the MPC8343/8349 family, and practical design notes that complement the NXP hardware specification.
Drop-in alternatives for MPC8347VRADDB — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with MPC8347VRADDB (same form factor and footprint) — differing in Ethernet, Operating Temperature, Security Engine, USB, Core Architecture.
MPC8343VRADDB
✅ Drop-InContact for price
View Datasheet →MPC8343CVRADDB
✅ Drop-InContact for price
View Datasheet →MPC8349CVVAJDB
✅ Drop-In📋 Reference alternative (not in catalog)
MPC8347EVVAJDB
✅ Drop-In📋 Reference alternative (not in catalog)
MPC8347VRAGDB
✅ Drop-In📋 Reference alternative (not in catalog)
MPC8347VRADDB Maximum Ratings & Electrical Characteristics
| Core Architecture | e300 (Power Architecture Book-E, 32-bit) |
| Core Frequency | 266 MHz |
| Operating Temperature | 0 C to +105 C |
| Silicon Revision | Rev 2 |
| Instruction Cache (L1) | 32 KB |
| Data Cache (L1) | 32 KB |
| Package | 620-pin HBGA (29x29 mm) |
| Memory Controller | DDR1/DDR2, 64-bit, with ECC |
| PCI Interface | 32-bit / 66 MHz PCI 2.2 |
| Ethernet | 10/100/1000 Mbit/sec (1 GbE MAC) |
| USB | USB 2.0 (host and device) |
| Security Engine | SEC 2.0 (AES, 3DES, SHA, IPSec, SSL/TLS) |
| Mounting Type | Surface Mount (BGA) |
| RoHS Status | Compliant (Pb-free) |
| Supply Voltage | 1.1 V core / 3.3 V I/O (dual-rail) |
| Number of Pins | 620 |
| MPU Series | PowerQUICC II Pro (MPC83xx) |
MPC8347VRADDB Pin Configuration
| Pin B1 | VDD — Core voltage (1.1 V nominal) |
| Pin B2 | GNDA — Ground (analog) |
| Pin AC1 | MA0 — Memory address bus 0 |
| Pin AC2 | MA1 — Memory address bus 1 |
| Pin AD1 | MD0 — Memory data bus 0 |
| Pin AD2 | MD1 — Memory data bus 1 |
| Pin A1 | PCI_AD0 — PCI address/data bus 0 |
| Pin A29 | PCI_FRAME — PCI cycle frame signal |
| Pin AC30 | ETH_TXD0 — Ethernet transmit data 0 |
| Pin AD30 | ETH_TXD1 — Ethernet transmit data 1 |
| Pin A30 | USB_DP — USB 2.0 data plus |
| Pin B30 | USB_DN — USB 2.0 data minus |
| Pin AC29 | JTAG_TCK — JTAG test clock |
| Pin AD29 | JTAG_TMS — JTAG test mode select |
Typical Applications
MPC8347VRADDB is suitable for 7 applications: Industrial Ethernet Switch / Router, Secure VPN / Firewall Appliance, Industrial Automation Controller / PLC, Wireless Base Station Controller (Small Cell / BTS), Point-of-Sale (POS) Terminal / Retail Payment Device, Medical Imaging Front-End / Diagnostic Controller, Network-Attached Storage / NAS Controller.
Industrial Ethernet Switch / Router
The MPC8347VRADDB fits industrial managed Ethernet switches and routers because its integrated 1 GbE MAC, hardware acceleration for IPv4/IPv6 forwarding, and SEC 2.0 engine let designs handle wire-speed routing and IPSec/SSL/TLS termination without external coprocessors. Combined with its 266 MHz e300 core and 32-bit/66 MHz PCI expansion, the part serves as the network processing unit when paired with multi-port PHY switches via the MII/GMII interface. The HBGA package provides the thermal dissipation path required for continuous 0-105C operation in fanless enclosures, while DDR1/DDR2 with ECC keeps packet buffers reliable at high throughput.
Recommended
Secure VPN / Firewall Appliance
The MPC8347VRADDB integrates the SEC 2.0 engine that offloads AES, 3DES, SHA-1/256, MD-5, and Kasumi in hardware - critical for VPN/firewall appliances that must sustain hundreds of Mbps of IPSec or SSL/TLS throughput at sub-millisecond latency. The 266 MHz e300 core runs the control-plane (routing/CLI policy engine) while the SEC engine executes data-plane crypto. The dual-rail 1.1 V core / 3.3 V I/O design lets designers split sensitive crypto-domain power planes from the I/O for EMC, and the 620-HBGA's 29x29 mm footprint leaves room on the PCB for additional Ethernet/PHY and TPM components typical of hardened security gateways.
Recommended
Industrial Automation Controller / PLC
In industrial PLC and motion-control controllers, the MPC8347VRADDB's deterministic e300 core, real-time interrupt controller, and four-channel DMA give accurate task scheduling for 0-105C factory-floor operation. The dual SPI, two I2C, and four UARTs on the part handle dense sensor and actuator wiring without external bus expanders, while the PCI bridge and local-bus controller connect to motor-driver and A/D-D/A daughter cards used in servo loops. Built-in ECC on the DDR memory controller protects against single-bit upsets in noisy electrical environments characteristic of industrial plants.
Recommended
Wireless Base Station Controller (Small Cell / BTS)
The MPC8347VRADDB's combination of 1 GbE MAC, PCI expansion (for baseband FPGA/DSP cards), USB 2.0 (for backhaul modem or diagnostics), and SEC 2.0 (for cipher acceleration on CPRI backhaul and management traffic) makes it a fit for small-cell base-station controllers in LTE/3GPP networks. The e300 core's integer performance supports the L2/L3 control-plane of the base station while hardware-assisted DMA reduces CPU loading on user-plane transfers. The wide 620-HBGA ball-grid exposes enough signal bandwidth for both Ethernet and PCI expansion.
Recommended
Point-of-Sale (POS) Terminal / Retail Payment Device
MPC8347VRADDB serves as the central processor in POS terminals where PCI-PTS compliance requires hardware crypto (SEC 2.0 engine provides AES/SHA/3DES), and the integrated USB 2.0 host handles barcode scanners, customer displays, and PIN pad peripherals. The 1 GbE MAC connects to back-office payment networks, while the 32-bit PCI enables expandability for receipt printers and cash drawer controls. The 0-105C industrial temperature rating and lead-free HBGA package make the part deployable in unattended retail enclosures that may run continuously for years.
Recommended
Medical Imaging Front-End / Diagnostic Controller
Medical imaging systems like ultrasound front-ends benefit from the MPC8347VRADDB's 32-bit/66 MHz PCI for high-resolution ADC data acquisition cards, plus the 1 GbE MAC for DICOM image transfer and the SEC engine for patient-data encryption. The 266 MHz core runs the imaging pipeline (beamforming, scan conversion) while DDR2 with ECC ensures data integrity for diagnostic-quality images. Operating across 0-105C and featuring a robust 620-HBGA package with ESD-aware I/O structures, the part is suitable for imaging subsystems complying with IEC 60601 design guidelines.
Recommended
Network-Attached Storage / NAS Controller
The MPC8347VRADDB's 1 GbE MAC, DDR2 with ECC, and PCI expansion are well matched to entry/mid-range NAS controllers, where the SEC engine accelerates encrypted-disk operations (AES-XTS) and the e300 core runs the RAID stack and file-system services. The dual-rail 1.1 V/3.3 V design lets hardware teams isolate the memory subsystem from noisy disk-interface supplies, and the 620-HBGA provides thermal margin for the sustained workload of a multi-drive enclosure. The integrated USB 2.0 supports external backups or UPS status reporting.
Recommended
Recommended Products Summary
Engineering reference data for MPC8347VRADDB — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | MPC8343VRADDB | MPC8343CVRADDB | MPC8349CVVAJDB | MPC8347EVVAJDB |
|---|---|---|---|---|---|
| Package | 620-HBGA (29x29) | 620-HBGA (29x29) - same | 620-HBGA (29x29) - same | 620-HBGA (29x29) - same | 620-HBGA (29x29) - same |
| Brand | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors |
| Core Frequency | 266 MHz | 266 MHz | 266 MHz | 600 MHz | 266 MHz |
| Security Engine (SEC 2.0) | Yes | No | No | No | Yes |
| Silicon Revision | Rev 2 | Rev 2 | Rev 3 | Rev 3 | Rev 2 |
| Operating Temperature | 0 to +105 C | 0 to +105 C | -40 to +105 C | -40 to +105 C | 0 to +105 C |
| Memory Controller | DDR1/DDR2, 64-bit, ECC | DDR1/DDR2, 64-bit, ECC | DDR1/DDR2, 64-bit, ECC | DDR1/DDR2, 64-bit, ECC | DDR1/DDR2, 64-bit, ECC |
| Lifecycle Status | Last Time Buy | Last Time Buy | Active (limited) | Active | Last Time Buy |
Key Differentiators
- Integrated SEC 2.0 crypto engine at this order-code class (vs MPC8343VRADDB)
- Lower clock vs higher-throughput MPC8349 in same footprint (vs MPC8349CVVAJDB)
- 0 to 105 C operating temperature vs -40 to 105 C siblings (vs MPC8343CVRADDB)
Design Notes
Estimated: the MPC8347VRADDB at 266 MHz dissipates approximately 1.5-2.0 W core power. The 620-HBGA junction-to-ambient thermal resistance is on the order of 15-20 C/W with a properly designed 6-8 layer PCB and via-in-pad thermal ball pattern. Use at least 4 thermal vias per 0.5 mm thermal-ball array in the center of the package, stitched through to inner copper pours, to keep Tj below 105 C in fanless industrial enclosures.
Estimated: allocate a 6-8 layer PCB stackup with dedicated ground and 1.1 V core planes plus a 3.3 V I/O plane. Follow NXP AN3889 for DDR2 trace length matching (within 50 mil on byte lanes), 100 ohm differential impedance for PCI/PCI-X, and 90 ohm for USB 2.0. All decoupling capacitors must be placed within 100 mil of their respective package pins, with 0.1 uF and 1 uF ceramic combinations per VDD ball group.
Do not apply power (1.1 V core or 3.3 V I/O) before the on-chip POR completes - hold RESET to logic-low for at least 32 warm-up oscillator cycles after the oscillator stabilizes. The DDR2 controller requires PLL lock before any DDR clock toggles; otherwise bus contention can latch the device into an undefined state. Also note that the 8347 part number's absence of a 'C' or 'E' suffix means the security engine is disabled in the SKU order code; verify the security-bootloader firmware path before assuming crypto acceleration is available.
Compliance Information
Per NXP product-page environmental data, the MPC8347VRADDB is supplied Pb-free and is RoHS/REACH compliant. Not AEC-Q100 qualified - this is an industrial SoC, not an automotive part. Halogen-free per JEDEC JS709.
