NCP3170BDR2G - 3A 18V Sync PWM Buck Converter SOIC-8 | onsemi
MPN: NCP3170BDR2G ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $2.7 | $2.70 |
| 10 | $2.45 | $24.50 |
| 100 | $1.85 | $185.00 |
| 500 | $1.45 | $725.00 |
| 1,000 | $1.18 | $1,180.00 |
NCP3170BDR2G Overview
A buck (step-down) switching regulator is a type of DC-DC converter that efficiently steps a higher input voltage down to a lower output voltage by rapidly switching an internal power transistor and storing it in an external inductor. It belongs to the broader hierarchy of switched-mode power supplies (SMPS), which also includes boost, buck-boost, and SEPIC topologies. SMPS ICs in turn belong to the power management IC family used to generate stable, efficient rails for downstream analog and digital ICs.
Key differentiating features include an internal 0.8 V ±2% reference, internal soft-start, power-good (PG) open-drain output, and internal compensation that minimizes external part count. The NCP3170 family (suffixes A and B) offers 3 A continuous output current, fixed-frequency PWM control for low noise, and a thermal-shutdown protection scheme. The B suffix (NCP3170B) is the 1 MHz switching-frequency option optimized for smaller inductors and capacitors.
The architecture is a peak current-mode controller with internal synchronous rectification, eliminating the need for an external Schottky diode. The high-side P-MOSFET (upper switch) and low-side N-MOSFET (lower switch) are integrated, which reduces board area, lowers BOM cost, and improves efficiency at light loads. Cycle-by-cycle current sensing on the high-side MOSFET provides fast overcurrent protection and inherent input voltage feed-forward for good line transient rejection.
Typical applications include point-of-load (POL) converters for FPGAs, ASICs, and DSPs, distributed 5 V/12 V bus regulation, networking and telecom card supplies, industrial control and factory-automation boards, and consumer set-top boxes. The 18 V input rating suits 12 V and 15 V rails common in distributed-power architectures.
When designing with this part, select the external inductor using the datasheet's L = VOUT / (IOUT × fSW × ΔIL) guideline (e.g., approximately 4.7 µH at 5 VOUT, 1 MHz). Place input/output ceramic capacitors close to the IC and use a star-ground scheme; routing the exposed pad (when present) to a large ground copper pour improves thermal dissipation at full 3 A load.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.
Drop-in alternatives for NCP3170BDR2G — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with NCP3170BDR2G (same form factor and footprint) — differing in Input Voltage Range, Output Voltage Range, Package, Soft Start, Switching Frequency.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
NCP3170ADR2G
✅ Drop-In📋 Reference alternative (not in catalog)
NCP3170BDR2
✅ Drop-In📋 Reference alternative (not in catalog)
NCP3170B
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
TPS54331DR
✅ Drop-In✓ In Stock
$0.85 / Unit
View Datasheet →MP2316GJ
✅ Drop-In📋 Reference alternative (not in catalog)
NCP3170BDR2G Maximum Ratings & Electrical Characteristics
| Topology | Synchronous Buck (Step-Down) |
| Input Voltage Range | 4.5 V to 18 V |
| Output Voltage Range | 0.8 V to VIN (adjustable) |
| Continuous Output Current | 3 A |
| Reference Voltage | 0.8 V (internal) |
| Switching Frequency | 1 MHz (B suffix) |
| Control Mode | Peak Current-Mode PWM |
| Internal Switches | High-side P-MOS + Low-side N-MOS |
| Soft-Start | Internal |
| Power Good Output | Yes (open-drain) |
| Operating Temperature Range | -40 C to +85 C (TA) |
| Package | 8-SOIC (0.154", 3.90 mm width) |
| Mounting Type | Surface Mount |
| MSL Level | 1 (unlimited floor life at <30 C / 85% RH) |
| RoHS Status | Compliant |
| Lead-Free | Yes |
NCP3170BDR2G Pin Configuration
| Pin 1 | BST — Bootstrap supply for high-side gate driver |
| Pin 2 | IN — Input supply voltage (4.5 V to 18 V) |
| Pin 3 | SW — Switch node - output to external inductor |
| Pin 4 | GND — Ground return |
| Pin 5 | FB — Feedback (to external resistor divider) |
| Pin 6 | COMP — Compensation network node |
| Pin 7 | EN — Enable (active high) |
| Pin 8 | PG — Power-good open-drain output |
Typical Applications
NCP3170BDR2G is suitable for 6 applications: FPGA / ASIC Point-of-Load Regulator, Distributed 12 V Bus Conversion, Industrial Control & Factory Automation, Set-Top Box & Consumer Electronics, Telecom Card & Networking Equipment, Battery-Powered Portable Equipment (with upstream regulator).
FPGA / ASIC Point-of-Load Regulator
The NCP3170BDR2G delivers a clean 1.0 V to 3.3 V rail from a 5 V or 12 V bus to power FPGA core, ASIC, and DSP loads up to 3 A. Its 1 MHz switching frequency and integrated synchronous MOSFETs minimize PCB area, while peak current-mode control provides the fast transient response demanded by digital ICs with dynamic load steps. The internal soft-start avoids inrush current that would otherwise sag the upstream bus, and the open-drain power-good output enables sequencing with other rails. Place the input/output ceramic capacitors within 1 X5 mm of the IC pins and use a 4.7 µH inductor rated for at least 4 A saturation. Compared with an LDO, the switching topology cuts thermal dissipation from tens of watts down to typically 1-2 W at 12 V to 3.3 V conversion.
Recommended
Distributed 12 V Bus Conversion
The NCP3170BDR2G is well suited to distributed-power architectures where a 12 V intermediate bus feeds individual point-of-load regulators on each card or sub-assembly. It accepts 4.5 V to 18 V inputs and produces adjustable rails from 0.8 V to near VIN, which lets designers tap off the 12 V bus directly to generate 5 V, 3.3 V, 2.5 V, or 1.8 V locally. Synchronous rectification delivers greater than 90% efficiency, reducing thermal stress and improving overall system energy efficiency in networking and telecom applications. Its 8-SOIC footprint fits compact daughter-card designs, and the power-good signal enables rail sequencing required by processors such as the i.MX RT1064.
Recommended
Industrial Control & Factory Automation
In industrial control boards the NCP3170BDR2G can derive local 5 V or 3.3 V rails from a 12 V or 15 V backplane. Its -40 C to +85 C operating-temperature range covers most factory-floor environments, and the integrated synchronous MOSFETs keep BOM cost and PCB area low. The peak current-mode control loop is stable with ceramic output capacitors, eliminating the bulk electrolytics required by older voltage-mode controllers. Designers should provide adequate PCB copper for thermal dissipation at full 3 A load, since the 8-SOIC package dissipates roughly 1 W per 0.4 W output power step. The open-drain power-good output can also drive a fault LED or enable logic for system diagnostics.
Recommended
Set-Top Box & Consumer Electronics
Consumer set-top boxes, DVRs, and streaming devices typically accept 12 V from an external brick and require internal rails of 5 V, 3.3 V, 1.8 V, and 1.0 V to power the SoC, DRAM, and peripherals. The NCP3170BDR2G, with its 4.5 V to 18 V input range and 3 A output, can produce any of these rails from the same upstream 12 V source, simplifying power-tree design. Its 1 MHz switching frequency pushes noise above the AM-band, easing EMI filtering, while synchronous rectification maintains greater than 90% efficiency at typical loads to meet energy-consumption regulations. The internal soft-start and power-good features comply with hot-swap and plug-in event requirements.
Recommended
Telecom Card & Networking Equipment
In telecom and networking line cards the NCP3170BDR2G can be used as a sub-rail converter after an isolated bus converter, generating low-voltage cores (1.0 V, 1.2 V, 1.8 V, 2.5 V, 3.3 V) for processors, ASICs, and DDR memory. The wide 4.5 V to 18 V input allows direct connection to a 5 V or 12 V intermediate bus. The integrated synchronous MOSFETs minimize external part count, while peak current-mode operation shares the loop bandwidth across multiple parallel phases for high-current rails. Power-good output enables sequencing with processor power-rail requirements, and the 8-SOIC footprint simplifies layout in dense card designs.
Recommended
Battery-Powered Portable Equipment (with upstream regulator)
Although the NCP3170BDR2G is not a battery-direct part, it can serve as the second-stage converter in portable equipment that runs from a 1S/2S Li-ion pack via an upstream boost to 5 V/12 V. The 1 MHz switching frequency supports small inductors and capacitors, allowing compact PCB implementation, and synchronous rectification maximizes battery runtime by reducing conduction loss. The internal soft-start prevents inrush on plug-in events, while the power-good output can signal the system MCU that the rail is stable. Designers can also use the EN pin to shut down the converter during deep-sleep modes for additional battery savings.
Recommended
Recommended Products Summary
Engineering reference data for NCP3170BDR2G — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | NCP3170ADR2G | NCP3170BDR2 | NCP3170B | TPS54331DR | MP2316GJ |
|---|---|---|---|---|---|---|
| Brand | onsemi | onsemi | onsemi | onsemi | Texas Instruments | MPS |
| Package | 8-SOIC | 8-SOIC - same | 8-SOIC - same | 8-SOIC - same | 8-SOIC - same | TSOT-23-8 |
| Topology | Synchronous Buck | Synchronous Buck - same | Synchronous Buck - same | Synchronous Buck - same | Synchronous Buck - same | Synchronous Buck - same |
| Input Voltage | 4.5 V to 18 V | 4.5 V to 18 V | 4.5 V to 18 V | 4.5 V to 18 V | 3.5 V to 28 V | 4.5 V to 19 V |
| Output Current | 3 A | 3 A | 3 A | 3 A | 3 A | 3 A |
| Switching Frequency | 1 MHz | 500 kHz | 1 MHz | 1 MHz | 570 kHz | 1.2 MHz |
| Reference Voltage | 0.8 V | 0.8 V | 0.8 V | 0.8 V | 0.8 V | 0.6 V |
| Power Good Output | Yes | Yes | Yes | Yes | Yes | Yes (PG open-drain) |
| Soft Start | Internal | Internal | Internal | Internal | Internal (slow start / SS pin) | Internal |
Key Differentiators
- Highest switching frequency in onsemi 3 A sync buck family (vs NCP3170ADR2G)
- Higher input voltage ceiling than MPS MP2316GJ (vs MP2316GJ)
- Lower quiescent current than TPS54331DR (vs TPS54331DR)
Design Notes
Estimated: at VIN = 12 V, VOUT = 3.3 V, IOUT = 3 A, the converter efficiency is approximately 90% based on typical datasheet curves, so power dissipation in the IC is approximately (VIN - VOUT) * IOUT * (1 - efficiency) ≈ (12 - 3.3) * 3 * 0.1 ≈ 2.6 W. The 8-SOIC package has θ_JA around 60-100 C/W on a standard JEDEC 4-layer test board, yielding a junction temperature rise of approximately 150-260 C above ambient if no copper pour is provided. A minimum 1 square inch of top-layer copper tied to GND is recommended for full 3 A operation.
Place the input ceramic capacitor (recommend 22 µF X5R 25 V 1210) within 1 mm of the IN and GND pins to minimize switching-loop inductance. The output capacitor (recommend 22 µF X5R 10 V 1210) should be similarly close to the SW node and the ground return. The feedback trace should be routed away from the SW node to avoid noise coupling, ideally with a small R-C snubber of 1-ohm + 10 nF across the SW-to-GND node if EMI is observed. Use a 4-layer board with a continuous ground plane for best thermal and EMI performance.
Do not exceed the absolute maximum VIN of 19 V - the part is not suitable for raw 24 V industrial bus inputs; choose an LMR16030 or LMR33640 for 24 V applications. The bootstrap capacitor on the BST pin must be a low-ESR ceramic (≥ 0.1 µF X7R); failure to use a ceramic cap can cause the high-side MOSFET to partially turn on and overheat. Do not omit the COMP network - even though internal compensation is advertised, stability verification with the actual output capacitors and ESR is required for production designs.
Route the SW node away from sensitive analog traces; the SW trace carries high dV/dt up to 18 V/ns at 1 MHz and can inject interference into feedback or ADC lines. Star-ground the analog GND (FB divider bottom) to the IC GND pin directly under the package, while power GND (input/output cap returns) should connect to the ground plane under the SW loop. Place the inductor between the SW pin and the load-side output capacitor; minimize this copper area to reduce radiated EMI.
Compliance Information
RoHS compliant and lead-free per onsemi product page and distributor listings. MSL 1 (unlimited floor life at less than 30 C / 85% RH). Not AEC-Q100 qualified - choose NCV-prefix onsemi automotive grade for vehicle applications.
