PIC18F05Q40-I/SL - 32KB Flash 8-bit MCU, 64MHz, 14-SOIC | Microchip
MPN: PIC18F05Q40-I/SL ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $1.4 | $1.40 |
| 10 | $1.26 | $12.60 |
| 100 | $1.1 | $110.00 |
| 500 | $0.95 | $475.00 |
| 1,000 | $0.85 | $850.00 |
| 3,000 | $0.78 | $2,340.00 |
PIC18F05Q40-I/SL Overview
A microcontroller (MCU) is a single-chip computer that integrates a CPU, memory, and programmable peripherals onto one IC. The PIC18 family uses a modified Harvard 8-bit RISC architecture with an instruction set optimized for C-compiled code (XC8). PIC MCUs sit in the broader hierarchy of embedded controllers, alongside 16-bit PIC24, 32-bit PIC32, and competitor families such as STM32 (Cortex-M) and AVR (megaAVR/XMEGA). Within Microchip, Q40-series parts are the dedicated ADC-and-PWM-rich "real-time control" sub-family, designed to replace external op-amps, analog comparators, and discrete timers with on-chip intelligent peripherals.
Key features include a 12-bit differential ADC with Computation engine for automated oversampling and filtering, 10-bit slope compensation, two 8-bit DACs, four 16-bit PWMs with complementary outputs and dead-band control, CLC for combinational/sequential logic without external glue, and built-in DMA that lets peripherals move data without CPU intervention. The device also includes an 8x8 hardware multiplier and a 32 MHz internal oscillator, reducing external component count in cost-sensitive designs.
Architecture-wise the PIC18-Q40 uses a 16-bit-wide instruction word with 8-bit data path, 31-level hardware stack, and a unified interrupt controller. The 12-bit ADC with Computation (ADC2) reduces software overhead by performing averaging, threshold detection, and burst averaging in hardware, enabling deterministic motor-control loops. Internal voltage reference and zero-cross detect accelerate closed-loop appliance and lighting designs.
Typical applications include BLDC and brushed DC motor control, LED lighting drivers, sensor hubs with DMA-driven acquisition, capacitive-touch user interfaces using the on-chip CLC and ADC2, home appliances, and IoT edge nodes. Designers typically place the MCU between the power-stage MOSFETs / LED strings and the host MCU to handle the deterministic timing-critical control loop locally.
When designing with this part, ensure the 14-SOIC exposed pad is soldered to a sufficient copper pour for thermal relief; power budget on FOSC=64 MHz at 3.3 V is roughly 12 mA active. Use MPLAB X IDE with the XC8 compiler and MPLAB Code Configurator (MCC) to graphically wire CLC and PWM peripherals - the MCC plugin generates the peripheral setup code and saves weeks of register-level firmware bring-up.
This page consolidates distributor pricing, drop-in alternatives from Microchip's Q40 family, and practical design notes that go beyond the manufacturer datasheet - giving procurement and firmware teams a single reference for the PIC18F05Q40-I/SL.
Drop-in alternatives for PIC18F05Q40-I/SL — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with PIC18F05Q40-I/SL (same form factor and footprint) — differing in Package, ADC, PWM, Core Architecture, Operating Temperature.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
PIC18F05Q40-E/SL
✅ Drop-In✓ In Stock
$0.74 / Unit
View Datasheet →PIC18F05Q40-I/ST
✅ Drop-In📋 Reference alternative (not in catalog)
PIC18F05Q40-E/ST
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$0.98 / Unit
View Datasheet →PIC18F04Q40-I/SL
✅ Drop-In✓ In Stock
$0.74 / Unit
View Datasheet →PIC18F04Q41-I/SL
✅ Drop-In✓ In Stock
$0.85 / Unit
View Datasheet →PIC18F06Q40-I/SL
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$1.18 / Unit
View Datasheet →PIC18F05Q40-I/SL Maximum Ratings & Electrical Characteristics
| Core Architecture | PIC18 8-bit RISC (modified Harvard) |
| Program Memory (Flash) | 32 KB |
| SRAM | 2 KB |
| EEPROM | 512 bytes |
| Maximum CPU Speed | 64 MHz (16 MIPS) |
| Supply Voltage (VDD) | 1.8 V to 5.5 V |
| ADC | 12-bit ADC2 with Computation, up to 20 channels |
| DAC | 8-bit DAC, two instances |
| PWM | 16-bit PWM, 4 channels |
| DMA Controller | Yes (peripheral-to-memory / memory-to-memory) |
| Configurable Logic Cells (CLC) | Yes |
| Comparators | Yes |
| Timers | 8-/16-bit timers |
| Communications | UART, SPI, I2C |
| Operating Temperature | -40C to +85C (industrial, "-I") |
| Package | 14-SOIC (SL) 150-mil |
| Mounting Type | Surface Mount |
| RoHS Status | Compliant |
PIC18F05Q40-I/SL Pin Configuration
| Pin 1 | RA0/ICSPDAT — Digital I/O / analog input / ICSP data (USART RX default) |
| Pin 2 | RA1/ICSPCLK — Digital I/O / analog input / ICSP clock |
| Pin 3 | RA2 — Digital I/O / analog input (peripherals: DAC1 ref) |
| Pin 4 | RA3 — Digital I/O / analog input (peripherals: DAC2 ref) |
| Pin 5 | RA4 — Digital I/O / analog input (peripherals: CLC, T0CKI) |
| Pin 6 | RA5 — Digital I/O / analog input / Master Clear (MCLR if configured) |
| Pin 7 | VSS — Ground reference |
| Pin 8 | RC0 — Digital I/O (peripherals: PWM1/PWM3 alternate) |
| Pin 9 | RC1 — Digital I/O (peripherals: PWM2/PWM4 alternate) |
| Pin 10 | RC2 — Digital I/O (peripherals: CCP1 / I2C-SCL) |
| Pin 11 | RC3 — Digital I/O (peripherals: SPI-MOSI / I2C-SDA) |
| Pin 12 | RC4 — Digital I/O (peripherals: SPI-MISO) |
| Pin 13 | RC5 — Digital I/O (peripherals: SPI-CLK) |
| Pin 14 | VDD — Positive supply 1.8 V to 5.5 V |
Typical Applications
PIC18F05Q40-I/SL is suitable for 7 applications: BLDC Motor Control, LED Lighting Drivers, Home Appliance Control Board, IoT Edge Sensor Node, Capacitive Touch User Interface, PMSM Servo Motor Drive, Sensor Hub with DMA Acquisition.
BLDC Motor Control
The PIC18F05Q40-I/SL's 12-bit ADC2 with Computation engine, four 16-bit PWMs with complementary outputs, and DMA controller make it ideal for sensorless and sensored BLDC motor control. Designers place the MCU between the gate-driver and the speed/position feedback: ADC2 samples back-EMF at 200 kS/s while DMA moves samples to RAM, freeing CPU cycles for the commutation algorithm and yielding deterministic 50 usec loop times. The CLC offloads hardware fault handling (overcurrent, desaturation) without CPU latency.
Recommended
LED Lighting Drivers
PWM dim-to-dark LED drivers benefit from the 16-bit PWM resolution of the PIC18F05Q40-I/SL: 1.8 kHz PWM with 0.0015 % duty step, paired with the 8-bit DAC for analog-current trims. The DMA controller streams frequency-modulation tables into the PWM duty register without CPU load, enabling flicker-free dimming. Two CLC blocks perform zero-cross detection and triac-trigger logic for phase-cut (TRIAC) retrofit bulbs in a single 14-SOIC part.
Recommended
Home Appliance Control Board
The PIC18F05Q40-I/SL targets the appliance market with on-chip peripherals that replace $1 worth of analog ICs. The DMA autonomously streams capacitance values from a touch-button matrix, the ADC2 with hardware oversampling reads temperature sensors to better than 0.01 C, and 16-bit PWMs drive buzzer and piezo-haptic. A single 14-SOIC handles induction-cooktop and rice-cooker main control, reducing BOM cost and PCB area versus competing 32-bit solutions.
Recommended
IoT Edge Sensor Node
Battery-powered IoT sensor nodes put the PIC18F05Q40-I/SL to work in 1.8 V operation at 1.8 MHz using the 32 kHz LFINTOSC plus DMA waking the CPU only for sensor-read or radio-TX events. The 12-bit ADC2 with burst averaging delivers 14-bit effective resolution for temperature, humidity and battery voltage, while CLC and DMA offload edge-event counting. The total sleep-mode current at 1.8 V is approximately 50 nA with the WDT enabled per datasheet DS40002328.
Recommended
Capacitive Touch User Interface
The PIC18F05Q40-I/SL's 12-bit ADC2 with Computation and CLC enable pic-micro capacitive touch without external ICs: charge-time measurement on every pin and CLC combining sensor pins for self-canceling electrodes. Hardware DMA acquires the 16-button matrix while the CPU runs other tasks, achieving <30 msec button-update rate at <1.2 mA active draw. The mTouch peripheral support library in MPLAB Code Configurator auto-calibrates the matrix.
Recommended
PMSM Servo Motor Drive
Field-oriented control (FOC) of permanent-magnet motors uses the PIC18F05Q40-I/SL's 16-bit PWM with 7.5 ns dead-band plus the dual 8-bit DACs for current-loop setpoints. A 16 MIPS Harvard core closes a 20 kHz FOC loop while leaving headroom for CAN/SSI feedback and on-board trapezoidal failure-handling via CLC. The 14-SOIC lowers BOM cost over Cortex-M0 +8 parts in price-sensitive robotics, fan and servo applications.
Recommended
Sensor Hub with DMA Acquisition
The PIC18F05Q40-I/SL's DMA streams 200 kS/s A-to-D reads from a multi-axis IMU / analog sensor array while the CPU sleeps, waking once per cycle to do a small AI inferencing job - firmware uses the 8-bit DSP-enhanced instructions and 8x8 hardware multiplier. The result is a passive sensor hub under 5 mW average power per datasheet DS40002328, ideal for sports-wear and industrial vibration monitors.
Recommended
Recommended Products Summary
Engineering reference data for PIC18F05Q40-I/SL — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | PIC18F05Q40-E/SL | PIC18F05Q40-I/ST | PIC18F04Q40-I/SL | PIC18F04Q41-I/SL |
|---|---|---|---|---|---|
| Package | 14-SOIC (SL) | 14-SOIC (SL) - same | 14-SOIC (ST) | 14-SOIC (SL) - same | 14-SOIC (SL) - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Flash Memory | 32 KB | 32 KB | 32 KB | 8 KB | 8 KB |
| SRAM | 2 KB | 2 KB | 2 KB | 1 KB | 1 KB |
| EEPROM | 512 bytes | 512 bytes | 512 bytes | 512 bytes | 256 bytes |
| Maximum CPU Speed | 64 MHz (16 MIPS) | 64 MHz (16 MIPS) | 64 MHz (16 MIPS) | 64 MHz (16 MIPS) | 64 MHz (16 MIPS) |
| Configurable Logic Cells | Yes | Yes | Yes | Yes | No |
| DMA Controller | Yes | Yes | Yes | Yes | No |
| Operating Temperature | -40C to +85C | -40C to +125C | -40C to +85C | -40C to +85C | -40C to +85C |
Key Differentiators
- Hardware DMA controller in an 8-bit MCU (vs PIC18F04Q41-I/SL)
- Highest flash density in 14-pin SOIC Q40 family (vs PIC18F04Q40-I/SL)
- 12-bit ADC2 with hardware Computation engine (vs PIC18F04Q41-I/SL)
- 16-bit PWM with complementary outputs and dead-band (vs PIC18F04Q41-I/SL)
Design Notes
The 14-SOIC (SL) package has a theta_JA of approximately 81 C/W on a standard JEDEC 4-layer board. Estimated: at FOSC=64 MHz, VDD=3.3 V, IDD~12 mA, total dissipation is ~40 mW, resulting in a 3.2 C junction rise above ambient. This is well below the 150 C absolute maximum and needs no heatsink even inside a sealed enclosure at +85 C ambient.
Place a 100 nF ceramic decoupling capacitor within 5 mm of VDD (pin 14), plus a bulk 4.7-10 uF tantalum or aluminum capacitor on the same VDD node. For ADC accuracy, use a separate AVSS-isolated copper pour and place a 100 nF + 10 uF RC on the analog supply trace. Per Microchip PIC18F-Q40 reference layout, keep the ICSP pins accessible for production programming - leave RA0/RA1 free of pull-ups so they can be configured during ICSP.
When migrating from PIC18F-K40 family code, remember that the Q40 adds DMA and CLC peripherals - their bits appear in SFRs that were reserved bits on older parts. Initialization code that clears all POR registers without checking reserved-bit behavior may erase DMA triggers. Use MCC-generated peripheral setup or read-modify-write with the master interrupt (GIEL) cleared. Also, when targeting 5.5 V operation the ADC input clamp to VDD+0.3 V applies - subtract 0.5 V headroom on analog-input PWM voltages.
Trace the ICSP signals RA0/ICSPDAT and RA1/ICSPCLK directly from the MCU to the programming connector - never add series resistors on ICSP lines (this fails programming). The MCLR pin (RA5 if configured for MCLR) needs a 10 kohm pull-up to VDD and a 100 nF cap to ground for proper reset. Per Microchip routing guidance, keep the ICP-bypass capacitor within 5 mm of the VDD pin to prevent power-rail glitch on ICSP entry.
Compliance Information
RoHS and REACH compliant per Microchip product page. Industrial-grade ("-I"), not AEC-Q100 qualified; for AEC-Q100 drop-in to PIC18F-Q71 family.
