PIC18F15Q40T-I/SO - 8-bit 64MHz MCU, 32KB Flash | Microchip
MPN: PIC18F15Q40T-I/SO ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $2.4 | $2.40 |
| 10 | $2.1 | $21.00 |
| 100 | $1.75 | $175.00 |
| 500 | $1.45 | $725.00 |
| 1,000 | $1.2 | $1,200.00 |
PIC18F15Q40T-I/SO Overview
A PIC18-Q40 microcontroller is a member of the 8-bit PIC18 family from Microchip, which itself sits within the broader category of microcontrollers (MCUs) and ultimately integrated circuits. PIC18-Q40 devices target low-pin-count, real-time signal-chain applications by combining a high-MIPS 8-bit core with sophisticated analog and digital peripherals that previously required external components. The ADCC (ADC-with-Computation) automates capacitive touch sensing (CVD), averaging, filtering, oversampling and threshold comparison, replacing software loops with hardware acceleration.
Key differentiating features include ADCC for advanced capacitive touch sensing, two 8-bit DACs for setpoint generation or waveform output, 16-bit PWMs with up to four channels for power-conversion and motor control, integrated DMA for offloading the CPU, PPS for flexible pin mapping, and a CLC block for combinational logic synthesis without external gates. The part operates across 1.8V to 5.5V VDD and supports an industrial temperature range of -40C to +85C.
Architecturally, the PIC18F15Q40T-I/SO uses an enhanced Harvard architecture with a 16-bit instruction word and an 8-bit data path, executed by the C-compiler-optimized PIC18 core. The ADCC and CLC blocks reduce firmware burden for touch and logic applications, while DMA enables high-throughput ADC-to-memory transfers without CPU intervention.
Typical applications include capacitive touch user interfaces, sensor signal conditioning, low-power motor control, LED lighting control, and compact IoT sensor nodes. The wide 1.8V to 5.5V supply range supports both 3.3V and 5V system rails.
When designing with this part, leverage PPS to remap peripherals to any digital I/O pin, which simplifies PCB layout. Ensure adequate decoupling with a 100 nF capacitor on VDD near the package and follow Microchip AN2648 (Capacitive Touch Design) for robust touch-sensing electrode patterns.
This page synthesizes current distributor pricing, drop-in alternative MPNs, and practical design notes beyond what is found in the manufacturer datasheet, supporting faster component selection and BOM finalization.
Drop-in alternatives for PIC18F15Q40T-I/SO — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with PIC18F15Q40T-I/SO (same form factor and footprint) — differing in DAC, Package, ADC, PWM, Program Memory (Flash).
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
PIC18F15Q40-I/SO
✅ Drop-In📋 Reference alternative (not in catalog)
PIC18F15Q40-E/SO
✅ Drop-In✓ In Stock
$1.02 / Unit
View Datasheet →PIC18F14Q41T-I/SO
✅ Drop-In✓ In Stock
$0.78 / Unit
View Datasheet →PIC18F14Q40T-I/SO
✅ Drop-In📋 Reference alternative (not in catalog)
PIC18F14Q41-I/SO
✅ Drop-In✓ In Stock
$1.52 / Unit
View Datasheet →PIC18F14Q41-E/SO
✅ Drop-In✓ In Stock
$1.25 / Unit
View Datasheet →PIC18F15Q40T-I/SO Maximum Ratings & Electrical Characteristics
| Core Architecture | 8-bit PIC18 enhanced Harvard |
| CPU Frequency (Max) | 64 MHz |
| Program Memory (Flash) | 32 KB (32K x 8) |
| SRAM | 2 KB |
| EEPROM | 512 bytes |
| ADC | 12-bit with Computation (ADCC) |
| DAC | 2 x 8-bit |
| PWM Channels | 16-bit PWM, up to 4 channels |
| DMA | Yes (Direct Memory Access) |
| Configurable Logic Cells (CLC) | Yes |
| Peripheral Pin Select (PPS) | Yes |
| Communication | UART, SPI, I2C |
| Supply Voltage (VDD) | 1.8 V to 5.5 V |
| Operating Temperature | -40C to +85C (Industrial, I) |
| Package | 20-SOIC (SO, 300 mil) |
| Mounting Type | Surface Mount |
| RoHS Status | Compliant |
| MSL Level | 1 (per Microchip SOIC package) |
PIC18F15Q40T-I/SO Pin Configuration
| Pin 1 | RA0/MCLR — Digital I/O / Master Clear (Reset) input; weak pull-up enabled in MCLR mode |
| Pin 2 | RA1 — Digital I/O; analog input; PPS-mappable |
| Pin 3 | RA2 — Digital I/O; analog input; PPS-mappable |
| Pin 4 | RA3 — Digital I/O; analog input; PPS-mappable |
| Pin 5 | RA4 — Digital I/O; analog input; PPS-mappable |
| Pin 6 | RA5 — Digital I/O; analog input; PPS-mappable |
| Pin 7 | VSS — Ground reference |
| Pin 8 | RA6 — Digital I/O; PPS-mappable |
| Pin 9 | RA7 — Digital I/O; PPS-mappable |
| Pin 10 | RB0 — Digital I/O; interrupt-on-change; PPS-mappable |
| Pin 11 | RB1 — Digital I/O; interrupt-on-change; PPS-mappable |
| Pin 12 | RB2 — Digital I/O; interrupt-on-change; PPS-mappable |
| Pin 13 | RB3 — Digital I/O; interrupt-on-change; PPS-mappable |
| Pin 14 | RB4 — Digital I/O; interrupt-on-change; PPS-mappable |
| Pin 15 | RB5 — Digital I/O; interrupt-on-change; PPS-mappable |
| Pin 16 | RB6 — Digital I/O; ICSPCLK; PPS-mappable |
| Pin 17 | RB7 — Digital I/O; ICSPDAT; PPS-mappable |
| Pin 18 | VDD — Positive supply (1.8 V to 5.5 V) |
| Pin 19 | VSS — Ground reference |
| Pin 20 | VDD — Positive supply (1.8 V to 5.5 V); tie to pin 18 on PCB |
Typical Applications
PIC18F15Q40T-I/SO is suitable for 6 applications: Capacitive Touch User Interface, Sensor Signal Conditioning and Acquisition, Low-Power Motor Control (BLDC / Stepper), IoT Edge Sensor Nodes, LED Lighting Control, Industrial Control Modules.
Capacitive Touch User Interface
The PIC18F15Q40T-I/SO is ideally suited for capacitive touch user-interface applications thanks to its integrated 12-bit ADC with Computation (ADCC). The ADCC automates Capacitive Voltage Divider (CVD) techniques, averaging, filtering, oversampling and threshold comparison, which would otherwise consume significant CPU cycles in firmware. With a 64 MHz / 16 MIPS core and 32 KB of Flash, the device can host Microchip's mTouch or custom touch libraries for up to 12 touch channels while retaining capacity for state-machine UI logic. Hardware CVD support reduces firmware burden, improving touch response time and noise immunity under glove or wet-finger conditions. Compared with a discrete touch controller, integrating ADCC into the MCU reduces BOM cost and PCB footprint while letting the firmware own the touch-tuning parameters.
Recommended
Sensor Signal Conditioning and Acquisition
The PIC18F15Q40T-I/SO works well as a sensor signal-conditioning front end, using the 12-bit ADCC for high-rate analog sampling and the integrated DMA to stream samples into SRAM without CPU intervention. The two 8-bit DACs can generate bias voltages for bridge or thermistor sensors, while the Configurable Logic Cells (CLC) combine comparator outputs to produce hardware-level threshold events. With 2 KB of SRAM and 64 MHz operation, the device can run low-rate DSP filters such as moving averages or FIR stages on up to four channels. The 1.8 V to 5.5 V supply range accommodates both 3.3 V MEMS sensors and 5 V industrial transmitters, simplifying mixed-signal sensor board design.
Recommended
Low-Power Motor Control (BLDC / Stepper)
The PIC18F15Q40T-I/SO drives small BLDC or stepper motors through its 16-bit PWM with up to four channels, including complementary outputs and programmable dead-band for half-bridge gate drivers. The 12-bit ADCC samples current shunt and back-EMF feedback at rates sufficient for low-RPM torque control, while DMA keeps the control loop deterministic by offloading sample transfers. The 64 MHz core executes field-oriented control (FOC) or trapezoidal commutation within a few hundred microseconds per electrical cycle. Designers targeting sub-30 A drives benefit from the 20-pin SOIC footprint, which keeps the BOM compact. For higher-current applications, port the same firmware to the pin-compatible PIC18F26Q40 (28-pin SOIC) with additional PWM channels.
Recommended
IoT Edge Sensor Nodes
The PIC18F15Q40T-I/SO powers compact IoT edge sensor nodes by combining low-power sleep modes with on-board peripherals such as ADCC, CLC and DMA, allowing sensor sampling and edge filtering to continue at very low current draw. The Peripheral Pin Select (PPS) lets the PCB designer map UART/SPI/I2C to any digital pin, simplifying board layout for compact modules. With 32 KB of Flash, the device can host a TLS-lite or LoRaWAN stack alongside sensor firmware. Designers using external radios such as LoRa or sub-GHz transceivers benefit from the UART/SPI interfaces with hardware DMA, which offloads the radio packet engine from the CPU.
Recommended
LED Lighting Control
The PIC18F15Q40T-I/SO is well matched to LED lighting controllers because of its 16-bit PWM channels, which deliver smooth dimming curves with sub-1% duty-cycle resolution. The two 8-bit DACs can drive warm/cool color-mixing channels, while ADCC provides ambient-light feedback for closed-loop daylight harvesting. CLC blocks generate hardware PWM dithering to extend effective PWM resolution beyond 16 bits without CPU overhead. The 1.8 V to 5.5 V supply range supports both battery-powered LED fixtures and 5 V architectural lighting drivers. Using PPS, designers can reassign PWM outputs to any I/O to optimize PCB routing for high-density LED matrices.
Recommended
Industrial Control Modules
The PIC18F15Q40T-I/SO fits industrial control modules where deterministic real-time response is required. Its 64 MHz core, DMA channels, and 16-bit PWM enable tight control loops for valve actuators, small pumps and conveyor sorters. The wide 1.8 V to 5.5 V supply range tolerates industrial 24 V rails when paired with a buck regulator, while the UART/SPI/I2C interfaces connect to RS-485 transceivers or CAN controllers through PPS-mapped pins. CLC blocks combine discrete logic functions in hardware, reducing BOM cost. Industrial users benefit from the extended-temperature PIC18F15Q40-E/SO variant, which operates from -40C to +125C for harsher cabinet environments.
Recommended
Recommended Products Summary
Engineering reference data for PIC18F15Q40T-I/SO — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | PIC18F15Q40-I/SO | PIC18F15Q40-E/SO | PIC18F14Q41T-I/SO | PIC18F14Q40T-I/SO |
|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 20-SOIC (SO) | 20-SOIC (SO) - same | 20-SOIC (SO) - same | 20-SOIC (SO) - same | 20-SOIC (SO) - same |
| Program Memory (Flash) | 32 KB | 32 KB | 32 KB | 16 KB | 16 KB |
| SRAM | 2 KB | 2 KB | 2 KB | 2 KB | 2 KB |
| CPU Frequency (Max) | 64 MHz | 64 MHz | 64 MHz | 64 MHz | 64 MHz |
| ADCC (12-bit ADC with Computation) | Yes | Yes | Yes | Yes | Yes |
| Operating Temperature | -40C to +85C (Industrial) | -40C to +85C | -40C to +125C (Extended) | -40C to +85C | -40C to +85C |
| Supply Voltage Range | 1.8 V to 5.5 V | 1.8 V to 5.5 V | 1.8 V to 5.5 V | 1.8 V to 5.5 V | 1.8 V to 5.5 V |
Key Differentiators
- Largest Flash density in PIC18-Q40 20-SOIC family (vs PIC18F14Q41T-I/SO)
- Q40 family ADCC with hardware CVD (vs PIC18F14K22T-I/SO)
- Integrated DMA, CLC and PPS in 20-pin SOIC (vs PIC18F14K50T-I/SO)
Design Notes
Place a 100 nF ceramic decoupling capacitor as close as possible to each VDD pin (18 and 20) with a short, wide trace to VSS. For designs with switching peripherals (PWM, UART at high baud), add a bulk 4.7 uF to 10 uF tantalum or ceramic capacitor near the MCU. The PIC18F15Q40T-I/SO operates from 1.8 V to 5.5 V, but brown-out behavior depends on the BOR setting in CONFIG1; select BOREN=ON and BORV=2.7V for typical 3.3 V battery-powered systems. Estimate: at 64 MHz the core current draw is approximately 12 mA, scaling to 1 uA in sleep.
Use the Peripheral Pin Select (PPS) feature to route UART, SPI, I2C and PWM outputs to any digital I/O pin, simplifying PCB routing and freeing dedicated pins for analog channels. Keep analog traces (RA1-RA5) short and away from PWM switching edges to minimize ADC noise coupling. The exposed SOIC pad is not present on this 20-pin package, so thermal dissipation relies on the package leads; a copper pour on both top and bottom layers connected to VDD/VSS reduces junction temperature by 10-15C.
Do not leave the MCLR/RA0 pin floating in MCLR mode; configure a 10 kohm pull-up to VDD or use the internal weak pull-up. When using the ADCC for capacitive touch, ensure the CVD timing registers (ADCCON3) match the electrode RC time constant - mismatched timing leads to unstable touch readings. For ISP programming, dedicate RB6 (ICSPCLK) and RB7 (ICSPDAT); disabling these through PPS will lock out the device. Finally, when migrating firmware from PIC18F14Q40 to PIC18F15Q40T-I/SO, update CONFIG registers to enable the ADCC and CLC peripherals - these are disabled by default to save power.
Compliance Information
RoHS and REACH compliant per Microchip product page; lead-free SOIC packaging. PIC18F15Q40T-I/SO is industrial grade (I suffix, -40C to +85C) and not AEC-Q100 qualified - select automotive-grade PIC18F15Q40-E/SO or -I/SO variants for harsh environments.
