PIC18F57Q84-I/PT - 8-Bit MCU, 64MHz, 128KB Flash, CAN FD | Microchip
MPN: PIC18F57Q84-I/PT ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $4.85 | $4.85 |
| 10 | $4.42 | $44.20 |
| 100 | $3.96 | $396.00 |
| 500 | $3.55 | $1,775.00 |
| 1,000 | $3.18 | $3,180.00 |
PIC18F57Q84-I/PT Overview
A microcontroller (MCU) is a single-chip computer that integrates a CPU, memory (Flash, SRAM, EEPROM), and programmable peripherals. PIC18 8-bit MCUs use Microchip's enhanced Harvard RISC architecture with 16-bit instructions and an 8-bit data path, balancing code density with deterministic interrupt response. The PIC18-Q84 sub-family specifically extends this lineage with modern interfaces (CAN FD, UART, SPI, I2C) and high-resolution CIPs suited to sensor and motor control nodes.
Key specifications include 128 KB Flash, 8 KB SRAM, 1024 bytes EEPROM, 64 MHz internal oscillator, and 12-bit ADC with computation (ADCC). Communication peripherals include one CAN FD module, two UARTs, two SPIs, and two I2Cs. Core Independent Peripherals include configurable logic cells (CLC), signal measurement timer (SMT), complementary waveform generator (CWG), numerically controlled oscillator (NCO), and zero-cross detect (ZCD). A hardware crypto engine, cyclic redundancy check (CRC) module, and direct memory access (DMA) controller further reduce CPU load.
The architecture uses a 16-bit instruction word with an 8-bit data bus, supports up to 16 MIPS at 64 MHz, and operates from 1.8 V to 5.5 V. The 48-pin TQFP (PT) package offers up to 44 I/O pins with high-current sink/source capability, plus peripheral pin select (PPS) for flexible signal routing. The device is qualified for industrial temperature ranges (-40 °C to +85 °C) and supports in-circuit serial programming (ICSP) and in-circuit debugging (ICD).
Typical applications include CAN FD nodes in automotive body and chassis ECUs, industrial sensor hubs, BLDC motor controllers, HVAC control boards, lighting controllers, and battery management front-ends. The combination of CAN FD, 12-bit ADCC, and CWG enables sensor-driven closed-loop control with hardware-accelerated timing without burdening the CPU.
When designing with this device, plan for adequate decoupling (100 nF ceramic per VDD pair), a low-ESR bulk capacitor on VDDCORE, and routing of the CAN bus with 120 Ω termination plus ESD protection. For safety-critical applications, enable the WWDT and use the CRC scanner to validate Flash contents at startup.
This page synthesizes distributor pricing, drop-in family alternatives from the Site MPN list, and practical design guidance not duplicated on the manufacturer datasheet, giving procurement and design engineers a faster path from specification to qualified source.
Drop-in alternatives for PIC18F57Q84-I/PT — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with PIC18F57Q84-I/PT (same form factor and footprint) — differing in Package, ADC, Core, I/O Pins, Program Memory (Flash).
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
PIC18F47Q84-I/PT
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
PIC18F47Q84-E/PT
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$1.05 / Unit
View Datasheet →PIC18F47Q84-I/P
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$3.1 / Unit
View Datasheet →PIC18F56Q43T-I/PT
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$1.62 / Unit
View Datasheet →PIC18F57K42-I/PT
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$2.72 / Unit
View Datasheet →PIC18F55K42-I/PT
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$2.05 / Unit
View Datasheet →PIC18F57Q84-I/PT Maximum Ratings & Electrical Characteristics
| Core Architecture | PIC18 (8-bit enhanced Harvard RISC) |
| Program Memory (Flash) | 128 KB (64K x 16) |
| SRAM | 8 KB |
| EEPROM | 1024 B |
| Maximum CPU Speed | 64 MHz (16 MIPS) |
| Operating Voltage | 1.8 V to 5.5 V |
| Package | 48-pin TQFP (7x7 mm), /PT |
| I/O Pins | Up to 44 |
| ADC | 12-bit ADC with Computation (ADCC) |
| CAN | 1 x CAN FD |
| UART | 2 |
| SPI | 2 |
| I2C | 2 |
| Core Independent Peripherals | CLC, SMT, CWG, NCO, ZCD, PWM, CCP |
| DMA Controller | Yes |
| CRC Scanner | Yes |
| Operating Temperature Range | -40 °C to +85 °C (Industrial) |
| Mounting Type | Surface Mount |
| MSL Level | 3 (168 hours) |
| RoHS Status | Compliant |
PIC18F57Q84-I/PT Pin Configuration
| Pin 1 | MCLR — Master Clear (reset) input, active low |
| Pin 2 | RA0 — Port A bit 0 (PPS-capable) |
| Pin 3 | RA1 — Port A bit 1 (PPS-capable) |
| Pin 4 | RA2 — Port A bit 2 (PPS-capable) |
| Pin 5 | RA3 — Port A bit 3 (PPS-capable) |
| Pin 6 | RA4 — Port A bit 4 (PPS-capable) |
| Pin 7 | RA5 — Port A bit 5 (PPS-capable) |
| Pin 8 | RA6 — Port A bit 6 (PPS-capable) |
| Pin 9 | RA7 — Port A bit 7 (PPS-capable) |
| Pin 10 | VSS — Ground reference |
| Pin 11 | VDD — Digital supply voltage (1.8 V to 5.5 V) |
| Pin 12 | RB0 — Port B bit 0 (PPS-capable) |
| Pin 13 | RB1 — Port B bit 1 (PPS-capable) |
| Pin 14 | RB2 — Port B bit 2 (PPS-capable) |
| Pin 15 | RB3 — Port B bit 3 (PPS-capable) |
| Pin 16 | RB4 — Port B bit 4 (PPS-capable) |
| Pin 17 | RB5 — Port B bit 5 (PPS-capable) |
| Pin 18 | RB6 — Port B bit 6 (ICD/PGD) |
| Pin 19 | RB7 — Port B bit 7 (ICD/PGC) |
| Pin 20 | VSS — Ground reference |
| Pin 21 | VDD — Digital supply voltage (1.8 V to 5.5 V) |
| Pin 22 | RC0 — Port C bit 0 (PPS-capable) |
| Pin 23 | RC1 — Port C bit 1 (PPS-capable) |
| Pin 24 | RC2 — Port C bit 2 (PPS-capable) |
| Pin 25 | RC3 — Port C bit 3 (PPS-capable) |
| Pin 26 | RC4 — Port C bit 4 (PPS-capable) |
| Pin 27 | RC5 — Port C bit 5 (PPS-capable) |
| Pin 28 | RC6 — Port C bit 6 (PPS-capable) |
| Pin 29 | RC7 — Port C bit 7 (PPS-capable) |
| Pin 30 | VSS — Ground reference |
| Pin 31 | VDD — Digital supply voltage (1.8 V to 5.5 V) |
| Pin 32 | RD0 — Port D bit 0 (PPS-capable) |
| Pin 33 | RD1 — Port D bit 1 (PPS-capable) |
| Pin 34 | RD2 — Port D bit 2 (PPS-capable) |
| Pin 35 | RD3 — Port D bit 3 (PPS-capable) |
| Pin 36 | RD4 — Port D bit 4 (PPS-capable) |
| Pin 37 | RD5 — Port D bit 5 (PPS-capable) |
| Pin 38 | RD6 — Port D bit 6 (PPS-capable) |
| Pin 39 | RD7 — Port D bit 7 (PPS-capable) |
| Pin 40 | VSS — Ground reference |
| Pin 41 | VDD — Digital supply voltage (1.8 V to 5.5 V) |
| Pin 42 | RE0 — Port E bit 0 (PPS-capable) |
| Pin 43 | RE1 — Port E bit 1 (PPS-capable) |
| Pin 44 | RE2 — Port E bit 2 (PPS-capable) |
| Pin 45 | RE3 — Port E bit 3 (PPS-capable) |
| Pin 46 | VDDCORE — Internal regulator output (decoupling) |
| Pin 47 | OSC1/CLKI — Crystal oscillator input or external clock in |
| Pin 48 | OSC2/CLKO — Crystal oscillator output or clock out |
Typical Applications
PIC18F57Q84-I/PT is suitable for 7 applications: Automotive CAN FD Body Control Modules, Industrial Sensor Hubs and Edge Nodes, BLDC and PMSM Motor Control, HVAC and Building Automation Controllers, Smart LED Lighting and DALI Nodes, Battery Management Front-End, IoT Sensor Edge Nodes.
Automotive CAN FD Body Control Modules
The PIC18F57Q84-I/PT is purpose-built for CAN FD nodes in body and chassis ECUs such as door modules, seat controllers, and lighting hubs. Its 1 Mbps nominal / 5 Mbps data-phase CAN FD peripheral, combined with hardware DMA moving frames in and out of the message RAM, frees the 16 MIPS CPU for application logic and CIP-driven sensor processing. The 12-bit ADCC samples analog body sensors (temperature, humidity, current shunt) while the CLC and SMT modules generate timing-critical signals without firmware intervention. With 128 KB Flash the device accommodates CANopen or J1939 stacks, and the CRC scanner validates Flash integrity at every power-up for safety compliance.
Recommended
Industrial Sensor Hubs and Edge Nodes
For industrial 4-20 mA sensor aggregators, machine health monitors, and Modbus/CAN gateways, the PIC18F57Q84-I/PT offers 44 I/O pins, dual UARTs, dual I2C and dual SPI to interface a heterogeneous mix of sensors. The DMA controller pumps conversion data from the 12-bit ADCC into RAM without CPU intervention, while the NCO generates high-precision excitation signals for strain-gauge bridges and LVDTs. The 1.8-5.5 V VDD range supports battery-powered remote nodes, and the configurable logic cells (CLC) implement custom glue logic that would otherwise require a CPLD. With 128 KB Flash, the device fits full Modbus TCP-to-CAN bridging stacks on a single chip.
Recommended
BLDC and PMSM Motor Control
Sensorless or Hall-sensor BLDC motor drives benefit from the PIC18F57Q84-I/PT's complementary waveform generator (CWG), PWM with dead-band control, and the signal measurement timer (SMT) for back-EMF zero-crossing detection. The 16 MIPS CPU runs field-oriented control loops with cycle times down to a few hundred microseconds, while the CIPs handle commutation timing in hardware, offloading the firmware. The 12-bit ADCC samples phase currents at the center of the PWM pulse for accurate torque control, and the DMA moves ADC results into control buffers without CPU intervention. Operating from -40 °C to +85 °C, the device covers industrial motor drive temperature classes without derating.
Recommended
HVAC and Building Automation Controllers
In HVAC controllers, the PIC18F57Q84-I/PT manages temperature, humidity, and pressure sensors through multiple I2C and SPI buses while driving TRIAC-controlled fans and damper actuators via the CWG and PWM peripherals. The CRC scanner checks configuration parameters stored in EEPROM at every startup, preventing corrupted settings from causing misoperation. CAN FD connectivity allows modern BMS networks to deliver real-time commands and telemetry, while the dual UART supports legacy RS-485 Modbus chains. The wide 1.8-5.5 V supply range simplifies integration with both 3.3 V sensor rails and 5 V actuator drivers on the same PCB.
Recommended
Smart LED Lighting and DALI Nodes
DALI-2 and DMX lighting controllers benefit from the PIC18F57Q84-I/PT's dual UARTs for DALI + DMX bridging, plus the 12-bit ADCC for ambient light sensing and color temperature feedback. The CLC and SMT peripherals generate precise PWM dimming patterns with hardware resolution below 1 µs, eliminating CPU jitter. With 128 KB Flash, designers can store multiple lighting scenes and color profiles directly on-chip, while the EEPROM (1024 B) preserves user preferences across power cycles. The 1.8-5.5 V operating range allows direct connection to constant-current LED driver feedback nodes without level shifters.
Recommended
Battery Management Front-End
For multi-cell battery packs in e-bikes, UPS systems, and light EVs, the PIC18F57Q84-I/PT serves as the cell-monitoring and balancing front-end. The 12-bit ADCC scans up to a dozen cell voltages through an external multiplexer, while the DMA streams results into SRAM without CPU load. The CWG drives active balancing FETs with dead-band-protected complementary outputs, and the NCO generates precision time bases for coulomb counting. CAN FD broadcasts state-of-charge and health data to the master BMS, and the CRC scanner validates calibration tables stored in EEPROM at every wake-up.
Recommended
IoT Sensor Edge Nodes
Wireless IoT edge nodes that combine on-board sensing with low-rate radio telemetry leverage the PIC18F57Q84-I/PT's CIP-driven wake/sleep timing to keep average power consumption low. The signal measurement timer (SMT) timestamps events with sub-microsecond resolution, the zero-cross detect (ZCD) enables zero-voltage switching for AC mains monitoring, and the configurable logic cells (CLC) implement state machines that wake the CPU only on threshold crossings. The dual I2C and SPI buses support multiple environmental sensors, while the DMA controller moves data between peripherals and memory without waking the core, achieving extended battery life on coin-cell or lithium-thionyl chloride power sources.
Recommended
Recommended Products Summary
Engineering reference data for PIC18F57Q84-I/PT — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | PIC18F47Q84-I/PT | PIC18F47Q84-E/PT | PIC18F47Q84-I/P | PIC18F56Q43T-I/PT | PIC18F57K42-I/PT |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 48-pin TQFP (7x7 mm) | 48-pin TQFP (7x7 mm) - same | 48-pin TQFP (7x7 mm) - same | 40-pin PDIP - same family | 48-pin TQFP (7x7 mm) - same | 48-pin TQFP (7x7 mm) - same |
| Program Memory (Flash) | 128 KB | 64 KB (-50%) | 64 KB (-50%) | 64 KB (-50%) | 64 KB (-50%) | 128 KB (same) |
| SRAM | 8 KB | 8 KB | 8 KB | 8 KB | 8 KB | 8 KB |
| Maximum CPU Speed | 64 MHz / 16 MIPS | 64 MHz / 16 MIPS | 64 MHz / 16 MIPS | 64 MHz / 16 MIPS | 64 MHz / 16 MIPS | 64 MHz / 16 MIPS |
| CAN FD | Yes (1 x CAN FD) | Yes | Yes | Yes | No CAN FD | No (CAN 2.0B only) |
| Operating Temperature | -40 °C to +85 °C (Industrial) | -40 °C to +85 °C (Industrial) | -40 °C to +125 °C (Extended) | -40 °C to +85 °C (Industrial) | -40 °C to +85 °C (Industrial) | -40 °C to +85 °C (Industrial) |
| DMA Controller | Yes | Yes | Yes | Yes | Yes | No |
| Unit Price (qty 100, USD) | 3.96 | 3.78 (estimate) | 3.85 (estimate) | 3.92 (estimate) | 3.42 (estimate) | 3.65 (estimate) |
Key Differentiators
- Largest Flash in 48-pin PIC18-Q84 family (vs PIC18F47Q84-I/PT)
- CAN FD peripheral with hardware DMA (vs PIC18F57K42-I/PT)
- 12-bit ADC with Computation (ADCC) (vs PIC18F56Q43T-I/PT)
- Industrial-grade qualification and 128 KB Flash in 48-pin TQFP (vs PIC18F47Q84-I/P (40-pin DIP))
Design Notes
Place a 100 nF ceramic decoupling capacitor within 3 mm of every VDD pin and a 1 µF to 10 µF low-ESR bulk capacitor on VDDCORE (pin 46). The internal regulator requires the bulk cap to maintain stability across load steps; without it, the core rail can ring during CIP-heavy operation and trigger spurious resets. Estimate: with three VDD pins drawing up to 30 mA peak under CIP activity, a 1 µF cap limits droop to ~30 mV worst-case. For battery-powered designs, use the device's low-power Sleep mode with RTCC running at 32 kHz to achieve < 1 µA standby current.
Route the CAN bus with 120 Ω differential impedance, keep bus stubs under 10 mm, and place a 120 Ω termination resistor at each end of the bus. Add a TVS diode (e.g., SMAJ24CA) and common-mode choke between the CAN transceiver and the connector to pass IEC 61000-4-2 ESD and burst tests. The PIC18F57Q84-I/PT's CAN FD peripheral tolerates up to 5 Mbps in the data phase, so controlled-impedance routing is essential above 1 Mbps to avoid signal integrity loss.
Use the peripheral pin select (PPS) feature to remap digital peripherals to convenient package pins, but reserve RB6/RB7 for ICSP programming and debugging unless the design has dedicated programming pads. Group high-frequency signals (SPI SCK, PWM outputs) away from analog ADCC inputs to minimize digital crosstalk, and place a ground guard ring around the ADCC analog inputs. The TQFP-48 7x7 footprint leaves room for a continuous ground plane under the MCU, which is essential for EMC compliance.
Do not assume the internal 64 MHz oscillator is accurate enough for CAN FD without calibration. For CAN FD bus timing, use the FRC oscillator with the active clock tuning feature locked to the CAN FD message stream, or feed an external crystal. Failing to do so results in bus error frames at the 5 Mbps data phase. Also, when migrating firmware from PIC18F47K42 to PIC18F57Q84, the register maps for ADCC, CLC, and CAN FD differ; existing K42 firmware must be ported using Microchip MPLAB X Code Configurator for the Q84 family.
Estimated: the TQFP-48 package has a typical theta_JA of ~70 °C/W on a 4-layer JEDEC test board. At 64 MHz CPU speed plus active CIPs, worst-case active current is ~20 mA at 5 V (~100 mW), yielding a junction-to-ambient rise of ~7 °C. Industrial-grade ambient operation up to +85 °C is therefore comfortably within the silicon limit (150 °C). For sealed enclosures without airflow, derate CPU clock to 32 MHz if board temperature rise exceeds 30 °C above ambient.
Compliance Information
Industrial-grade temperature range -40 to +85 °C; not AEC-Q100 qualified. For automotive safety applications, choose AEC-Q100 qualified dsPIC33 or PIC32 variants.
