PIC18LC601T-I/PT - 8-Bit ROM-less MCU, 25MHz, 64-TQFP | Microchip
MPN: PIC18LC601T-I/PT ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $9.45 | $9.45 |
| 10 | $8.5 | $85.00 |
| 100 | $7.55 | $755.00 |
| 500 | $6.85 | $3,425.00 |
| 1,000 | $6.2 | $6,200.00 |
PIC18LC601T-I/PT Overview
Background: An 8-bit microcontroller (MCU) is a single-chip computer built around an 8-bit data path, typically a Harvard architecture that separates instruction fetch and data memory buses to maximize throughput. PIC18-series devices are Microchip's high-performance 8-bit line, featuring a RISC instruction set with single-cycle execution, hardware multiplier, and 16-bit wide instructions. The 'LC' sub-family denotes a low-voltage CMOS variant optimized for operation across 2.0 V to 5.5 V, targeting battery-powered and portable designs. ROM-less parts ship without internal program memory, instead fetching over an external memory interface - a common choice for prototyping, secure bootloaders, and systems whose firmware size exceeds the integrated Flash budget.
Key features include the external memory interface (EMI), a 10-bit ADC with up to 8 channels, multiple serial peripherals (USART, MSSP for SPI/I2C), capture/compare/PWM modules, and a low-power SLEEP instruction. The architecture supports up to 2 MB of linear program memory addressing. The 64-TQFP footprint exposes the full set of PIC18 peripheral pins including PORTA-G, plus dedicated external memory bus pins.
Typical applications are industrial control panels, motor drive sequencers, instrumentation front-ends, and embedded development platforms where external program memory is required for large firmware images, IP, or field-reprogrammability. It is also used in educational and evaluation boards where firmware is loaded from external EPROM during development.
Design consideration: Because this part is ROM-less, every board must include an external program memory device (e.g. 27C256 EPROM, SST39SF010 Flash) and ensure address/data bus timing matches the chosen memory access profile - careful PCB layout of the parallel bus is essential to avoid EMI and timing violations. Surface-mount TQFP-64 also demands standard 0.5 mm pitch land pattern with 4-layer PCB recommended for bus integrity.
Drop-in alternatives for PIC18LC601T-I/PT — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with PIC18LC601T-I/PT (same form factor and footprint) — differing in Package, Core Architecture, Operating Temperature, ADC, I/O Pins.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
PIC18LC601-I/PT
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View Datasheet →PIC18LC601T-I/PT Maximum Ratings & Electrical Characteristics
| Core Architecture | PIC18 (8-bit RISC, Harvard) |
| Family | PIC18C series |
| Program Memory Type | ROM-less (external memory bus) |
| Maximum CPU Frequency | 25 MHz |
| SRAM Size | 1536 bytes |
| Supply Voltage Range | 2.0 V to 5.5 V (LC low-voltage variant) |
| I/O Pins | 26 |
| ADC | 10-bit, up to 8 channels |
| Timers | 2x 8-bit, 3x 16-bit |
| PWM Channels | 2 |
| Input Capture Modules | 2 |
| Serial Interfaces | USART (1x), MSSP for SPI/I2C (1x) |
| External Memory Bus | Yes (16-bit data, up to 2 MB linear addressing) |
| Package | TQFP-64 (PT), 10x10 mm, 0.5 mm pitch |
| Operating Temperature | -40C to +85C (Industrial) |
| Mounting Type | Surface Mount |
| MSL Level | 3 (per JEDEC J-STD-020, reflow peak 250C) |
PIC18LC601T-I/PT Pin Configuration
| Pin 1 | OSC1/CLKI — Crystal oscillator input or external clock input |
| Pin 2 | OSC2/CLKO — Crystal oscillator output or clock output |
| Pin 3 | MCLR/VPP — Master clear (reset) input / programming voltage |
| Pin 4 | RA0/AN0 — PORTA bit 0 / analog input 0 |
| Pin 5 | RA1/AN1 — PORTA bit 1 / analog input 1 |
| Pin 6 | RA2/AN2/VREF- — PORTA bit 2 / analog input 2 / VREF- |
| Pin 7 | RA3/AN3/VREF+ — PORTA bit 3 / analog input 3 / VREF+ |
| Pin 8 | RA4/T0CKI — PORTA bit 4 / Timer0 clock input |
| Pin 9 | RA5/AN4/SS — PORTA bit 5 / analog input 4 / SPI slave select |
| Pin 10 | RA6 — PORTA bit 6 |
| Pin 11 | VSS — Ground reference |
| Pin 12 | VDD — Positive supply voltage (2.0-5.5 V) |
| Pin 13 | RB0/INT0 — PORTB bit 0 / external interrupt 0 |
| Pin 14 | RB1/INT1 — PORTB bit 1 / external interrupt 1 |
| Pin 15 | RB2/INT2 — PORTB bit 2 / external interrupt 2 |
| Pin 16 | RB3/CCP2A — PORTB bit 3 / CCP2 channel A |
| Pin 17 | RB4 — PORTB bit 4 |
| Pin 18 | RB5/PGM — PORTB bit 5 / LVP programming |
| Pin 19 | RB6/PGC — PORTB bit 6 / ICSP clock |
| Pin 20 | RB7/PGD — PORTB bit 7 / ICSP data |
| Pin 21 | RC0/T1OSO/T1CKI — PORTC bit 0 / Timer1 oscillator out / T1 clock in |
| Pin 22 | RC1/T1OSI/CCP2 — PORTC bit 1 / Timer1 oscillator in / CCP2 |
| Pin 23 | RC2/CCP1 — PORTC bit 2 / CCP1 |
| Pin 24 | RC3/SCK/SCL — PORTC bit 3 / SPI clock / I2C clock |
| Pin 25 | RC4/SDI/SDA — PORTC bit 4 / SPI data in / I2C data |
| Pin 26 | RC5/SDO — PORTC bit 5 / SPI data out |
| Pin 27 | RC6/TX/CK — PORTC bit 6 / USART TX / USART clock |
| Pin 28 | RC7/RX/DT — PORTC bit 7 / USART RX / USART data |
| Pin 29 | VSS — Ground reference |
| Pin 30 | VDD — Positive supply voltage (2.0-5.5 V) |
| Pin 31 | RD0 — PORTD bit 0 |
| Pin 32 | RD1 — PORTD bit 1 |
| Pin 33 | RD2 — PORTD bit 2 |
| Pin 34 | RD3 — PORTD bit 3 |
| Pin 35 | RD4 — PORTD bit 4 |
| Pin 36 | RD5 — PORTD bit 5 |
| Pin 37 | RD6 — PORTD bit 6 |
| Pin 38 | RD7 — PORTD bit 7 |
| Pin 39 | RE0/AN5 — PORTE bit 0 / analog input 5 |
| Pin 40 | RE1/AN6 — PORTE bit 1 / analog input 6 |
| Pin 41 | RE2/AN7 — PORTE bit 2 / analog input 7 |
| Pin 42 | RE3 — PORTE bit 3 |
| Pin 43 | VSS — Ground reference |
| Pin 44 | VDD — Positive supply voltage (2.0-5.5 V) |
| Pin 45 | RF0 — PORTF bit 0 |
| Pin 46 | RF1 — PORTF bit 1 |
| Pin 47 | RF2 — PORTF bit 2 |
| Pin 48 | RF3 — PORTF bit 3 |
| Pin 49 | RF4 — PORTF bit 4 |
| Pin 50 | RF5 — PORTF bit 5 |
| Pin 51 | RF6 — PORTF bit 6 |
| Pin 52 | RF7 — PORTF bit 7 |
| Pin 53 | RG0 — PORTG bit 0 |
| Pin 54 | RG1 — PORTG bit 1 |
| Pin 55 | RG2 — PORTG bit 2 |
| Pin 56 | RG3 — PORTG bit 3 |
| Pin 57 | RG4 — PORTG bit 4 |
| Pin 58 | AVSS — Analog ground reference |
| Pin 59 | AVDD — Analog positive supply voltage |
| Pin 60 | NC — Not connected |
| Pin 61 | NC — Not connected |
| Pin 62 | NC — Not connected |
| Pin 63 | NC — Not connected |
| Pin 64 | NC — Not connected |
Typical Applications
PIC18LC601T-I/PT is suitable for 6 applications: Industrial Control Panels and PLC Sequencers, Motor Drive Sequencing Controllers, Instrumentation Front-End Controllers, Embedded Development and Prototyping Boards, Medical Device Front-Panels and Displays, Security and Access Control Panels.
Industrial Control Panels and PLC Sequencers
The PIC18LC601T-I/PT's 25 MHz CPU, 1536-byte SRAM, 26 I/O lines, and industrial temperature grade (-40C to +85C) make it well-suited for industrial control panels and PLC sequencers. The external memory bus supports large ladder-logic or state-machine firmware images that exceed on-chip Flash limits, while the 10-bit ADC reads analog sensor inputs. Placed on a backplane with opto-isolated inputs, the LC601 executes deterministic scan loops; engineers add an external EPROM/Flash and supervisor (e.g. MCP130) for robust industrial deployments. Compared to integrated-Flash PIC18F parts, the LC601's external memory bus allows field updates and IP separation.
Recommended
Motor Drive Sequencing Controllers
The PIC18LC601T-I/PT fits motor drive applications where multi-axis sequencing, PWM generation, and encoder feedback must run on an 8-bit Harvard core with predictable interrupt latency. The 2 PWM channels and 2 input capture modules handle brushed or stepper motor control loops; the 25 MHz core runs PID loops at adequate update rates for small industrial drives. Pair the LC601 with external gate drivers and isolated current sensing. Designers add external Flash for parameter storage (drive profiles) and EEPROM emulation. The TQFP-64 footprint and industrial temperature grade support under-hood or cabinet-mounted operation.
Recommended
Instrumentation Front-End Controllers
Test and measurement front-ends (digital multimeters, bench oscilloscopes, lab data loggers) leverage the PIC18LC601T-I/PT's deterministic 8-bit instruction flow, 25 MHz throughput, and external memory bus. The 10-bit ADC samples transducer signals while the USART streams data to a host PC; the external memory bus stores calibration tables and lookup arrays that exceed on-chip Flash. Industrial temperature grade suits bench equipment. Pair with precision op-amps (OPA227) for signal conditioning. Compared to higher-performance ARM Cortex-M parts, the LC601 offers predictable interrupt latency and a simpler toolchain (MPLAB-XC8) for legacy designs.
Recommended
Embedded Development and Prototyping Boards
Educational and prototyping boards use the PIC18LC601T-I/PT as the host MCU because the external memory bus allows firmware to be loaded into swappable EPROM or Flash chips during development, letting students change program memory without re-programming the MCU itself. The 64-pin TQFP package exposes all PIC18 peripheral pins for breadboard-friendly breakout boards. Combined with MPLAB-X development tools and the legacy PIC18 instruction set, the LC601 is a teaching staple. Compared to modern PIC18F parts with integrated Flash, the LC601's separate program memory is pedagogically illustrative of Harvard architecture principles.
Recommended
Medical Device Front-Panels and Displays
Medical device front-panels (infusion pump control boards, patient monitor keypads, diagnostic instrument displays) use the PIC18LC601T-I/PT for its long-life-cycle availability, industrial temperature grade, and deterministic real-time performance. The 10-bit ADC reads sensor inputs, the 2 PWM channels drive LED backlights or buzzer alerts, and the USART/SPI/I2C peripherals link to the main medical SoC. External memory stores UI strings and calibration data. The LC601's broad clinical market history and Microchip's product longevity program make it suitable for FDA-cleared designs where component change control is critical. Pair with isolation barriers for patient-connected circuits.
Recommended
Security and Access Control Panels
Access control panels and intrusion alarm keypads deploy the PIC18LC601T-I/PT because the external memory bus can store large user databases and event logs in external Flash, while the 26 I/O lines scan keypads, drive relays, and read door sensors. The 25 MHz core runs the access decision firmware deterministically; the 10-bit ADC monitors battery and tamper circuits. The industrial temperature grade suits outdoor or uncontrolled-environment installations. Compared to modern Cortex-M0+ alternatives, the LC601's robust PIC18 ecosystem and long-term availability make it a reliable choice for security OEMs requiring 10+ year product lifecycles.
Recommended
Recommended Products Summary
Engineering reference data for PIC18LC601T-I/PT — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | PIC18LC601-I/PT | PIC18C601T-I/PT | PIC18C601-I/PT | PIC18F8720-E/PT | PIC18F8620-E/PT | PIC18F8722T-E/PT |
|---|---|---|---|---|---|---|---|
| Package | TQFP-64 (PT), 10x10 mm, 0.5 mm pitch | TQFP-64 (PT) - same | TQFP-64 (PT) - same | TQFP-64 (PT) - same | TQFP-64 (PT) - same | TQFP-64 (PT) - same | TQFP-64 (PT) - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Core Architecture | PIC18 8-bit RISC, ROM-less | PIC18 8-bit RISC, ROM-less | PIC18C 8-bit RISC, ROM-less | PIC18C 8-bit RISC, ROM-less | PIC18F 8-bit RISC, integrated Flash | PIC18F 8-bit RISC, integrated Flash | PIC18F 8-bit RISC, integrated Flash |
| Maximum CPU Frequency | 25 MHz | 25 MHz | 25 MHz | 25 MHz | 40 MHz (10 MIPS) | 40 MHz (10 MIPS) | 40 MHz (10 MIPS) |
| SRAM Size | 1536 bytes | 1536 bytes | 1536 bytes | 1536 bytes | 3840 bytes | 3840 bytes | 3904 bytes |
| Program Memory Type | External (ROM-less, external memory bus) | External (ROM-less) | External (ROM-less) | External (ROM-less) | Internal 128 KB Flash | Internal 64 KB Flash | Internal 128 KB Flash |
| Supply Voltage Range | 2.0 V to 5.5 V (LC low-voltage) | 2.0 V to 5.5 V (LC) | 4.2 V to 5.5 V (C original) | 4.2 V to 5.5 V (C original) | 2.0 V to 5.5 V (F) | 2.0 V to 5.5 V (F) | 2.0 V to 5.5 V (F) |
| I/O Pins | 26 | 26 | 26 | 26 | 68 (more peripheral-rich) | 68 | 68 |
Key Differentiators
- Low-voltage 2.0 V to 5.5 V operation (vs PIC18C601T-I/PT)
- True ROM-less with external memory bus (vs PIC18F8720-E/PT)
- Long product lifecycle with Microchip longevity program (vs Generic 8-bit ROM-less MCUs)
Design Notes
Estimated layout: place the TQFP-64 PIC18LC601 and external program memory device (e.g. SST39SF010 Flash) within 50 mm of each other to keep the parallel address/data traces short. Route the address bus (PORTA, PORTH on extended variants) and data bus (PORTB-PORTG) as length-matched groups with controlled impedance (50 ohm target) on a 4-layer PCB with continuous ground plane. Avoid routing bus signals across split planes or near switching power converter edges.
Decouple each VDD/VSS pair on the LC601 with a 100 nF ceramic capacitor placed within 3 mm of the pins, plus a 10 uF bulk tantalum or ceramic near the package. Add a 10 uF bulk on AVDD/AVSS with a ferrite bead to isolate analog supply noise from digital switching. Estimated quiescent current of the LC601 is under 10 mA at 25 MHz, so a 100 mA LDO (MCP1700 family) is sufficient for this MCU alone but must be sized for external memory and peripherals.
Do not omit an external supervisor / reset IC such as the MCP130 family - the LC601's MCLR input is sensitive to brownouts below 2.0 V and may enter undefined states. Do not assume the 'LC' suffix automatically means 3.3 V - the LC601 operates from 2.0 V to 5.5 V with frequency derating below 4.2 V. When migrating PIC18C firmware to PIC18LC, verify that all timing-dependent code paths still meet setup/hold requirements at the chosen lower VDD. ROM-less means PC RAM does not include program storage - external memory interface must be configured at reset before code execution.
Compliance Information
RoHS/REACH status not explicitly stated in verified web data; Microchip PIC18 family is generally RoHS compliant and lead-free, but specific LC601 lot marking must be confirmed with distributor CoC. AEC-Q100 not applicable to legacy 8-bit MCU - choose automotive-grade PIC18F variants for AEC-Q100 requirements.
