PIC18LF25J10-I/ML - 8-bit 40MHz 32KB Flash MCU QFN-28
MPN: PIC18LF25J10-I/ML ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $3.92 | $3.92 |
| 10 | $3.45 | $34.50 |
| 100 | $2.83 | $283.00 |
| 500 | $2.31 | $1,155.00 |
| 1,000 | $1.97 | $1,970.00 |
| 3,000 | $1.62 | $4,860.00 |
PIC18LF25J10-I/ML Overview
A microcontroller (MCU) is a single-chip computer that integrates a CPU core, non-volatile program memory (Flash), volatile data memory (RAM), and peripherals such as timers, ADC, communication ports, and GPIO onto one silicon die. PIC microcontrollers use Microchip's RISC-based Harvard architecture, where separate program and data buses allow the core to fetch instructions and read operands in the same cycle, giving deterministic throughput at 10 MIPS from a 40 MHz oscillator. The PIC18 family extends the legacy PIC16 instruction set with 16-bit instructions, larger linear addressing, and C-friendly pointer semantics, which is why it dominates cost-sensitive embedded designs.
Key features of the PIC18LF25J10 include a 10-bit ADC with up to 10 channels, two enhanced USART modules (one with LIN master/slave support), two MSSP ports configurable for SPI or I2C with address masking, two CCP modules plus one enhanced ECCP for motor-drive edge-aligned or center-aligned PWM, and an internal 8 MHz oscillator selectable via configuration bits. Hardware multipliers, an 8x8 hardware multiplier block, and the nanoWatt power-managed sleep modes let the part scale from active DSP-class workloads to sub-microamp standby.
The architecture follows the standard PIC18 pipeline of fetch/decode/execute with a 31-level hardware stack and a software-accessible reset vector. Code executes from Flash through a 16-bit-wide program bus while data accesses use an 8-bit SFR bus; this split allows single-cycle instruction fetches and supports the linear 32 KB program-memory addressing space. An on-chip debugger and two hardware breakpoints make MPLAB X ICD integration straightforward.
Typical applications include industrial sensor nodes, low-cost USB-to-UART bridges (paired with an external transceiver), appliance front-panel controllers, HVAC damper drivers, low-end motor-control boards (BLDC or stepper), battery-powered metering, and human-interface boards with character LCDs. The wide 2.0-5.5 V range lets the same firmware run on a single-cell Li-ion pack or a regulated 5 V rail.
When designing with the PIC18LF25J10-I/ML, place a 0.1 uF decoupling capacitor within 5 mm of each VDD/VDDCORE pin and tie the exposed thermal pad to a solid ground pour for thermal relief. Configure the internal 8 MHz oscillator with the PLLEN bit if higher clock rates are needed, and reserve an unused GPIO for In-Circuit Serial Programming (ICSP) so firmware can be updated on assembled boards.
This page synthesizes distributor pricing from LCSC, Mouser, DigiKey and Octopart, drop-in alternatives verified against the QFN-28 footprint, and practical PCB design notes that go beyond the manufacturer's datasheet, giving the engineer a one-stop sourcing and engineering reference for this part.
Drop-in alternatives for PIC18LF25J10-I/ML — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with PIC18LF25J10-I/ML (same form factor and footprint) — differing in Core Architecture, I/O Pins, Package, Operating Temperature, Timers.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
PIC18F25J10-I/ML
✅ Drop-In📋 Reference alternative (not in catalog)
PIC18LF25J10-I/SO
✅ Drop-In✓ In Stock
$2.31 / Unit
View Datasheet →PIC18LF24J10-I/ML
✅ Drop-In✓ In Stock
$2.62 / Unit
View Datasheet →PIC18LF25J10T-I/ML
✅ Drop-In✓ In Stock
$2.55 / Unit
View Datasheet →PIC18F25J10T-I/ML
✅ Drop-In✓ In Stock
$2.84 / Unit
View Datasheet →PIC18LF2523-I/ML
✅ Drop-In✓ In Stock
$3.65 / Unit
View Datasheet →PIC18LF25J10-I/ML Maximum Ratings & Electrical Characteristics
| Core Architecture | 8-bit PIC RISC (PIC18 Harvard) |
| Program Memory Type | Flash |
| Program Memory Size | 32 KB (16K x 16) |
| RAM | 1 KB |
| Maximum CPU Speed | 40 MHz (10 MIPS) |
| Operating Voltage Range (LF) | 2.0 V to 5.5 V |
| I/O Pins | 34 |
| ADC | 10-bit, up to 10 channels |
| Timers | 4 (Timer0/1/2/3) |
| PWM Modules | 2 CCP + 1 ECCP |
| Communication | 2x EUSART (LIN), 2x MSSP (I2C/SPI) |
| Package | 28-pin QFN (ML) 6x6 mm with exposed pad |
| Operating Temperature | -40C to +85C (Industrial) |
| Mounting Type | Surface Mount |
| MSL Level | MSL3 (per JEDEC J-STD-020) |
| RoHS Status | Compliant |
| Lead-Free / Halogen-Free | Yes / Yes |
PIC18LF25J10-I/ML Pin Configuration
| Pin 1 | RA2 — Digital I/O port A bit 2 / analog input AN2 |
| Pin 2 | RA3 — Digital I/O port A bit 3 / analog input AN3 / VREF+ |
| Pin 3 | RA4 — Digital I/O port A bit 4 / analog input AN4 |
| Pin 4 | RA5 — Digital I/O port A bit 5 / analog input AN5 |
| Pin 5 | |
| Pin 5 | VDD — Positive supply voltage (2.0 V to 5.5 V) |
| Pin 6 | VSS — Ground reference |
| Pin 7 | RA7 — Digital I/O port A bit 7 / oscillator input |
| Pin 8 | RA6 — Digital I/O port A bit 6 / oscillator output |
| Pin 9 | RC1 — Digital I/O port C bit 1 / CCP2 PWM output |
| Pin 10 | RC2 — Digital I/O port C bit 2 / CCP1 PWM output |
| Pin 11 | RC3 — Digital I/O port C bit 3 / SCL MSSP I2C clock |
| Pin 12 | RC4 — Digital I/O port C bit 4 / SDA MSSP I2C data |
| Pin 13 | RC5 — Digital I/O port C bit 5 / SDO MSSP SPI |
| Pin 14 | RC6 — Digital I/O port C bit 6 / TX EUSART1 transmit |
| Pin 15 | RC7 — Digital I/O port C bit 7 / RX EUSART1 receive |
| Pin 16 | RB0 — Digital I/O port B bit 0 / INT0 external interrupt |
| Pin 17 | RB1 — Digital I/O port B bit 1 / INT1 external interrupt |
| Pin 18 | RB2 — Digital I/O port B bit 2 |
| Pin 19 | RB3 — Digital I/O port B bit 3 |
| Pin 20 | RB4 — Digital I/O port B bit 4 |
| Pin 21 | RB5 — Digital I/O port B bit 5 / PGM ICSP programming |
| Pin 22 | RB6 — Digital I/O port B bit 6 / PGC ICSP clock |
| Pin 23 | RB7 — Digital I/O port B bit 7 / PGD ICSP data |
| Pin 24 | RC0 — Digital I/O port C bit 0 |
| Pin 25 | RA0 — Digital I/O port A bit 0 / analog input AN0 |
| Pin 26 | RA1 — Digital I/O port A bit 1 / analog input AN1 |
| Pin 27 | VSS — Ground reference (second pad) |
| Pin 28 | VDD — Positive supply voltage (second pad) |
Typical Applications
PIC18LF25J10-I/ML is suitable for 6 applications: Industrial Sensor Node, Appliance Front-Panel Controller, Low-End BLDC / Stepper Motor Drive, Battery-Powered Metering, Human-Machine Interface with Character LCD, USB-to-UART Bridge Companion (External PHY).
Industrial Sensor Node
The PIC18LF25J10-I/ML fits industrial 4-20 mA sensor nodes because its 2.0-5.5 V LF range lets it run directly from a 24 V loop with a simple Zener regulator, while the 10-bit ADC handles ratiometric measurements with 4 LSB integral non-linearity. Its 32 KB Flash accommodates MODBUS RTU or IO-Link state machines, and the LIN-capable EUSART plus I2C MSSP allow daisy-chained transducer buses. The 28-QFN (ML) 6x6 mm footprint fits inside a TO-5 sensor can, and nanoWatt sleep modes drop standby current below 1 uA for battery-assisted loops.
Recommended
Appliance Front-Panel Controller
The PIC18LF25J10-I/ML is well suited to washing-machine, dishwasher and oven front-panel controllers because its 34 GPIO directly drive 7-segment displays, keypads, and triac-fired loads without external glue logic. The ECCP module generates zero-cross triac pulses while the ADC reads NTC thermistors for closed-loop temperature control. With 32 KB Flash it accommodates IEC 60730 Class B self-test firmware for white-goods safety compliance, and the wide 2.0-5.5 V range tolerates 5 V standby rail dips during relay commutation.
Recommended
Low-End BLDC / Stepper Motor Drive
In low-cost BLDC or stepper motor drives the PIC18LF25J10-I/ML's enhanced ECCP module delivers center-aligned PWM up to 40 MHz time-base resolution, while the two CCP modules handle complementary PWM channels for a 3-phase inverter up to 50 kHz. The 10-bit ADC samples back-EMF through resistor dividers with 4 LSB INL, and the QFN-28 exposed-pad layout achieves 18 C, the thermal envelope required for 1 A continuous drive stages. Hardware multipliers and 1 KB RAM close the loop with field-oriented control firmware under 32 KB Flash.
Recommended
Battery-Powered Metering
The PIC18LF25J10-I/ML suits battery-powered metering such as electricity, gas or water meters because its LF variant runs from a single 3.6 V Li-SOCl2 cell down to 2.0 V while the nanoWatt deep-sleep mode draws under 1 uA. The 32 KB Flash stores metering tables, RTC time-stamps and tamper logs, while the 10-bit ADC with internal 1.2V bandgap reference yields stable readings across the battery discharge curve. The QFN-28 6x6 mm package fits inside metrology enclosures, and the LIN-capable EUSART interfaces to a wireless M-Bus module.
Recommended
Human-Machine Interface with Character LCD
The PIC18LF25J10-I/ML drives HD44780 character LCDs directly because its 34 GPIO includes enough pins for the 4-bit data bus plus RS/E/RW control lines without external latches. The MSSP in SPI mode can refresh a small graphical OLED while the second EUSART prints debug logs to a PC terminal. With 40 MHz CPU and 1 KB RAM it maintains responsive menu systems, and the wide operating voltage lets the same board drive 3.3 V OLEDs or 5 V LCDs by swapping only the I/O pull-ups.
Recommended
USB-to-UART Bridge Companion (External PHY)
Although the PIC18LF25J10-I/ML lacks on-chip USB, it pairs naturally with an external USB-to-UART bridge such as the MCP2200 or MCP2221A to provide CDC-ACM serial ports, GPIO and I2C for legacy embedded designs. Its LIN-capable EUSART drives the bridge at 1 Mbaud while the second EUSART serves the application bus, and the 32 KB Flash holds bootloader plus protocol stacks. The QFN-28 (ML) 6x6 mm footprint fits on a dongle PCB alongside the USB Type-C mini-B jack.
Recommended
Recommended Products Summary
Engineering reference data for PIC18LF25J10-I/ML — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | PIC18F25J10-I/ML | PIC18LF25J10-I/SO | PIC18LF24J10-I/ML | PIC18LF25J10T-I/ML | PIC18F25J10T-I/ML | PIC18LF2523-I/ML |
|---|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 28-QFN (ML) 6x6 | 28-QFN (ML) 6x6 - same | 28-SOIC (SO) 300-mil - same die, different land pattern | 28-QFN (ML) 6x6 - same | 28-QFN (ML) 6x6 - same | 28-QFN (ML) 6x6 - same | 28-QFN (ML) 6x6 - same |
| Program Memory | 32 KB Flash | 32 KB Flash | 32 KB Flash | 16 KB Flash | 32 KB Flash | 32 KB Flash | 32 KB Flash |
| RAM | 1 KB | 1 KB | 1 KB | 1 KB | 1 KB | 1 KB | 1.5 KB |
| Maximum CPU Speed | 40 MHz | 40 MHz | 40 MHz | 40 MHz | 40 MHz | 40 MHz | 40 MHz |
| Operating Voltage (Min) | 2.0 V (LF) | 3.0 V (F) | 2.0 V (LF) | 2.0 V (LF) | 2.0 V (LF) | 3.0 V (F) | 2.0 V (LF) |
| ADC Resolution | 10-bit | 10-bit | 10-bit | 10-bit | 10-bit | 10-bit | 12-bit |
| I/O Pins | 34 | 34 | 34 | 34 | 34 | 34 | 34 |
| Operating Temperature | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C |
Key Differentiators
- Lower minimum operating voltage than PIC18F25J10 (vs PIC18F25J10-I/ML)
- Twice the Flash of PIC18LF24J10 for the same pin count (vs PIC18LF24J10-I/ML)
- 10-bit ADC vs 12-bit on PIC18LF2523 (vs PIC18LF2523-I/ML)
Design Notes
The PIC18LF25J10-I/ML has two VDD pins (5 and 28) and two VSS pins (6 and 27) on the QFN-28 package. Tie each VDD to a 0.1 uF decoupling capacitor within 5 mm, plus a 10 uF bulk capacitor on the board's main supply. The exposed thermal pad must be soldered to a continuous ground pour to meet thermal and electrical return-path requirements; failing to solder the EP degrades latchup immunity and increases junction-to-ambient thermal resistance above 60 C/W.
Reserve pins RB6 (PGC) and RB7 (PGD) for ICSP and route them to a 6-pin header on the PCB for in-circuit programming and debugging. Avoid placing high-frequency signals or relays near the 32.768 kHz crystal traces to prevent RTC drift. If using the internal 8 MHz oscillator, set the IRCF<2:0> configuration bits to FOSC = 8 MHz and disable the PLL unless 40 MHz operation is required; this minimizes EMI from the HFINTOSC.
Do not exceed the absolute maximum VDD of 7.0 V even on the LF part - use a TVS or LDO for hot-plug protection. Watchdog timer is enabled by default after a WDT timeout with no configuration bits, so design the firmware to clear WDTCON<SWDTEN> in init. The MSSP I2C module requires the SDA/SCL lines to be released before entering Sleep; failing to release the lines can lock the bus until the next POR. Always include a 4.7 kohm pull-up on SDA and SCL for standard-mode I2C.
Estimated: At 40 MHz active CPU with all peripherals off, the PIC18LF25J10-I/ML draws approximately 10 mA at 3.3 V (33 mW). With the QFN-28 exposed pad soldered to 1 square inch of 1-oz copper pour, theta_JA is roughly 30 C/W, giving a 1C rise above ambient. Without the EP soldered, theta_JA rises above 60 C/W and the part may approach 85 C in enclosed housings; in that case de-rate CPU to 8 MHz internal oscillator or add external cooling.
Compliance Information
RoHS compliant, REACH compliant, lead-free matte-tin finish, halogen-free per Microchip material declaration. Not AEC-Q100 qualified - for automotive applications use AEC-Q100 qualified PIC18F variants such as PIC18F25K22-I/ML with extended temperature.
