PIC24HJ128GP204-E/ML - 16-bit 40MIPS 128KB Flash MCU | Microchip
MPN: PIC24HJ128GP204-E/ML ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $7.2 | $7.20 |
| 10 | $6.48 | $64.80 |
| 100 | $5.76 | $576.00 |
| 500 | $5.18 | $2,590.00 |
| 1,000 | $4.61 | $4,610.00 |
PIC24HJ128GP204-E/ML Overview
A 16-bit microcontroller (MCU) is an integrated circuit that combines a CPU core, program memory (Flash), data memory (SRAM), and peripherals into a single chip. The PIC24H family is part of Microchip's dsPIC/PIC24 architecture that pairs a 16-bit modified Harvard CPU with DSP-oriented instruction extensions, occupying the middle ground between 8-bit MCUs (PIC16/PIC18) and 32-bit Cortex-M parts. Within the broader hierarchy, PIC24H sits as: PIC24H -> PIC24 family -> 16-bit MCU -> microcontroller -> embedded processor -> semiconductor. This architecture enables deterministic real-time control with single-cycle multiply and divide, supporting digital signal processing tasks alongside conventional control firmware.
Key features include 21 general-purpose I/O pins, four 16-bit timers/counters, two UART modules, two SPI interfaces, two I2C modules, a 16-channel 10-bit ADC with 500 ksps conversion rate, a 10-bit DAC, input capture, output compare, and a Parallel Master Port for external memory expansion. A hardware CRC module and 5V-tolerant I/O increase robustness against transients on automotive buses.
The PIC24HJ128GP204-E/ML is pin-compatible with the dsPIC33F family and shares peripheral IP, giving firmware developers a migration path to DSP instructions without redesigning the PCB. The 44-pin QFN (8x8) footprint also matches smaller-pinout PIC24FJ parts, simplifying BOM flexibility. Operating at 40 MIPS (25 ns instruction cycle at 80 MHz internal clock from a 40 MHz input), it handles sensor fusion, motor control loops, and serial bridging simultaneously.
Typical applications include automotive body and chassis ECUs, industrial sensor hubs, BLDC/PMSM motor control, digital power conversion, medical instrumentation, and ruggedized IoT gateways. The integrated CAN-ready peripherals and AEC-Q100 qualification make it well suited for under-hood and vehicle network nodes.
When designing with this part, choose decoupling capacitors per the device's recommended layout in the manufacturer datasheet and place the 40 MHz primary oscillator crystal as close to the OSCI/OSCO pins as possible. The -E suffix indicates the extended -40C to +125C operating range; choose -I variants only if the design is limited to -40C to +85C.
This page synthesizes distributor pricing, drop-in same-package alternatives, and practical design notes not found on the manufacturer datasheet, optimized for engineers sourcing or designing with the PIC24HJ128GP204-E/ML.
Drop-in alternatives for PIC24HJ128GP204-E/ML — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with PIC24HJ128GP204-E/ML (same form factor and footprint) — differing in Package, I/O Pins, I2C, Timers, SPI.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
PIC24HJ128GP204-I/ML
✅ Drop-In✓ In Stock
$4.45 / Unit
View Datasheet →PIC24HJ128GP204-E/PT
✅ Drop-In📋 Reference alternative (not in catalog)
PIC24HJ64GP204-E/ML
✅ Drop-In📋 Reference alternative (not in catalog)
DSPIC33FJ128GP204-E/ML
✅ Drop-In✓ In Stock
$2.76 / Unit
View Datasheet →PIC24HJ128GP202-I/MM
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
dsPIC33FJ128GP204-I/ML
✅ Drop-In📋 Reference alternative (not in catalog)
PIC24HJ128GP204-E/ML Maximum Ratings & Electrical Characteristics
| Core Architecture | PIC24H 16-bit |
| Maximum CPU Speed | 40 MIPS (80 MHz internal, 40 MHz input) |
| Program Memory (Flash) | 128 KB (43K x 24) |
| RAM | 8 KB |
| Supply Voltage Range | 3.0 V to 3.6 V |
| Operating Temperature Range | -40C to +125C (extended, -E suffix) |
| I/O Pins | 21 |
| Package | 44-pin QFN (8x8 mm, ML suffix) |
| ADC | 10-bit, up to 16 channels, 500 ksps |
| DAC | 10-bit, 1 channel |
| Timers | 5 x 16-bit (Timer1-Timer5) |
| UART | 2 modules |
| SPI | 2 modules |
| I2C | 2 modules |
| Input Capture / Output Compare | Yes (8 channels combined) |
| Parallel Master Port (PMP) | Yes |
| Hardware CRC | Yes |
| DMA | 8 channels |
| Automotive Qualification | AEC-Q100 |
| RoHS / REACH | ROHS3 compliant, REACH unaffected |
| Moisture Sensitivity Level (MSL) | MSL 1 |
PIC24HJ128GP204-E/ML Pin Configuration
| Pin 1 | RP3/CN3/RB3 — Remappable peripheral pin / IO |
| Pin 2 | RP2/CN2/RB2 — Remappable peripheral pin / IO |
| Pin 3 | RP1/CN1/RB1 — Remappable peripheral pin / IO |
| Pin 4 | RP0/CN0/RB0 — Remappable peripheral pin / IO |
| Pin 5 | RP9/CN9/RB9 — Remappable peripheral pin / IO |
| Pin 6 | RP8/CN8/RB8 — Remappable peripheral pin / IO |
| Pin 7 | RP7/CN7/RB7 — Remappable peripheral pin / IO |
| Pin 8 | RP6/CN6/RB6 — Remappable peripheral pin / IO |
| Pin 9 | RP5/CN5/RB5 — Remappable peripheral pin / IO |
| Pin 10 | RP4/CN4/RB4 — Remappable peripheral pin / IO |
| Pin 11 | VDD — Core supply voltage |
| Pin 12 | VSS — Core ground |
| Pin 13 | OSC1/CLKI/RA1 — Crystal input / external clock / IO |
| Pin 14 | OSC2/CLKO/RA2 — Crystal output / clock out / IO |
| Pin 15 | FLTA/RA3 — PWM fault input / IO |
| Pin 16 | RA4 — IO |
| Pin 17 | PWM1H/RA5 — PWM output high / IO |
| Pin 18 | PWM1L/RA6 — PWM output low / IO |
| Pin 19 | PWM2H/RA7 — PWM output high / IO |
| Pin 20 | PWM2L/RA8 — PWM output low / IO |
| Pin 21 | VSS — Ground |
| Pin 22 | VDD — Core supply voltage |
| Pin 23 | AN0/RA0 — Analog input 0 / IO |
| Pin 24 | AN1/RB10 — Analog input 1 / IO |
| Pin 25 | AN2/RB11 — Analog input 2 / IO |
| Pin 26 | AN3/RB12 — Analog input 3 / IO |
| Pin 27 | AN4/RB13 — Analog input 4 / IO |
| Pin 28 | AN5/RB14 — Analog input 5 / IO |
| Pin 29 | AN6/RB15 — Analog input 6 / IO |
| Pin 30 | AN7/RC0 — Analog input 7 / IO |
| Pin 31 | AN8/RC1 — Analog input 8 / IO |
| Pin 32 | AN9/RC2 — Analog input 9 / IO |
| Pin 33 | VSS — Ground |
| Pin 34 | VDD — Core supply voltage |
| Pin 35 | SOSCI/RC3 — Secondary oscillator input / IO |
| Pin 36 | SOSCO/RC4 — Secondary oscillator output / IO |
| Pin 37 | RC5 — IO |
| Pin 38 | RC6 — IO |
| Pin 39 | RC7 — IO |
| Pin 40 | RC8 — IO |
| Pin 41 | RC9 — IO |
| Pin 42 | MCLR — Master clear reset (active low) |
| Pin 43 | AVDD — Analog supply voltage |
| Pin 44 | AVSS — Analog ground |
Typical Applications
PIC24HJ128GP204-E/ML is suitable for 6 applications: Automotive Body and Chassis ECUs, BLDC and PMSM Motor Control, Industrial Sensor Hubs and IO-Link Masters, Digital Power Conversion (PFC, LLC, Buck/Boost), Medical Instrumentation and Patient Monitoring, Ruggedized IoT Gateways and Edge Nodes.
Automotive Body and Chassis ECUs
The PIC24HJ128GP204-E/ML is purpose-built for automotive body and chassis ECUs thanks to its AEC-Q100 qualification, -40C to +125C extended temperature range, and 40 MIPS deterministic 16-bit CPU. It powers lighting controllers, seat modules, HVAC flaps, door-zone controllers, and wiper modules where reliable CAN/LIN communication and robust PWM generation are essential. The 128 KB Flash accommodates AUTOSAR-style or vendor-specific stacks with bootloader overhead, while the 8 KB SRAM is sufficient for protocol buffers plus small RTOS instances. Its 5V-tolerant I/O and hardware CRC simplify OBD-II diagnostic data integrity. Placed on a 4-layer PCB with proper decoupling per the manufacturer datasheet, the part delivers automotive-grade reliability across 15+ year service lifetimes typical of vehicle electronics.
Recommended
BLDC and PMSM Motor Control
The PIC24HJ128GP204-E/ML drives small to mid-power BLDC and PMSM motors using its 5 x 16-bit timers, 8 input-capture/output-compare channels, and 16-channel 500 ksps ADC. Its deterministic 25 ns instruction cycle (40 MIPS) supports field-oriented control loops with sub-100 us update rates for pumps, fans, e-bike traction motors, and appliance compressors. The QFN-44 package exposes a thermal pad that conducts switching losses to copper pour, keeping junction temperature below the +125C limit under sustained drive. For high-current three-phase drives above 1 kW, designers typically pair this MCU with external gate drivers and current-sense amplifiers. The integrated input-capture makes sensorless BEMF zero-cross detection feasible with the on-chip ADC and op-amp peripherals.
Recommended
Industrial Sensor Hubs and IO-Link Masters
Industrial sensor hubs and IO-Link masters benefit from the PIC24HJ128GP204-E/ML's combination of UART/SPI/I2C peripherals, 21 GPIOs, and 40 MIPS performance for protocol bridging. The 128 KB Flash hosts IO-Link stack plus user application logic, while the DMA engine offloads repetitive sensor reads without CPU intervention. The AEC-Q100 grade and extended -40C to +125C temperature range suit factory-floor installations near motors and switching power supplies. The Parallel Master Port allows external display or memory expansion for HMI panels. Two I2C and two SPI buses enable multi-sensor aggregation with deterministic timing for process control loops in PLCs and remote I/O nodes.
Recommended
Digital Power Conversion (PFC, LLC, Buck/Boost)
Digital power conversion stages including PFC, LLC resonant converters, and synchronous buck/boost regulators leverage the PIC24HJ128GP204-E/ML's 40 MIPS CPU to run voltage-mode and average-current-mode control loops in firmware. The 10-bit ADC with 500 ksps sampling rate captures inductor current and output voltage at switching frequencies up to several hundred kHz, while the high-speed PWM built from output-compare modules generates the gate-drive waveforms. The 10-bit DAC supports analog reference generation or external supervisory chains. Designers target efficiency above 90% with adaptive dead-time insertion and valley-switching algorithms. The -40C to +125C temperature range is critical inside sealed power-supply enclosures where ambient may reach +85C plus internal self-heating.
Recommended
Medical Instrumentation and Patient Monitoring
Medical instrumentation including portable patient monitors, infusion pumps, and diagnostic analyzers use the PIC24HJ128GP204-E/ML as the main controller when designs need deterministic real-time response and high reliability. The 16-bit CPU executes filtering and sensor-fusion algorithms with single-cycle MAC operations, while the 128 KB Flash supports safety-critical firmware with bootloader redundancy. The integrated 10-bit ADC pairs well with external 16-/24-bit sigma-delta converters for ECG, SpO2, and temperature acquisition. AEC-Q100 qualification simplifies IEC 60730 compliance for家用 medical devices with safety-class firmware. The QFN-44 footprint suits compact handheld enclosures, and the wide temperature range supports transport between air-conditioned wards and warmer bedside environments.
Recommended
Ruggedized IoT Gateways and Edge Nodes
Ruggedized IoT gateways and edge-compute nodes in outdoor, automotive, or industrial deployments use the PIC24HJ128GP204-E/ML as a deterministic edge controller running local sensor fusion before forwarding via Wi-Fi, LoRa, or cellular modules. Its 40 MIPS throughput handles TLS handshake offload, JSON serialization, and OTA-update handling without external RAM. The 8 KB SRAM plus 128 KB Flash accommodates lightweight MQTT-SN or CoAP stacks plus vendor application logic. The hardware CRC engine secures boot images and OTA differentials, while the dual UART/SPI ports interface with radios and sensors simultaneously. The -40C to +125C rating ensures operation in outdoor enclosures, vehicle trunks, and factory cabinets without thermal derating, making it a strong fit for asset trackers and smart-meter data concentrators.
Recommended
Recommended Products Summary
Engineering reference data for PIC24HJ128GP204-E/ML — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | PIC24HJ128GP204-I/ML | PIC24HJ128GP204-E/PT | PIC24HJ64GP204-E/ML | dsPIC33FJ128GP204-E/ML | dsPIC33FJ128GP204-I/ML |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 44-QFN (8x8) | 44-QFN (8x8) - same | 44-TQFP - same pinout, different footprint | 44-QFN (8x8) - same | 44-QFN (8x8) - same | 44-QFN (8x8) - same |
| Core | PIC24H 16-bit | PIC24H 16-bit | PIC24H 16-bit | PIC24H 16-bit | dsPIC33F 16-bit DSP | dsPIC33F 16-bit DSP |
| Flash | 128 KB | 128 KB | 128 KB | 64 KB (-50%) | 128 KB | 128 KB |
| RAM | 8 KB | 8 KB | 8 KB | 8 KB | 8 KB | 8 KB |
| CPU Speed | 40 MIPS | 40 MIPS | 40 MIPS | 40 MIPS | 40 MIPS | 40 MIPS |
| Operating Temperature | -40C to +125C (extended) | -40C to +85C (industrial) | -40C to +125C (extended) | -40C to +125C (extended) | -40C to +125C (extended) | -40C to +85C (industrial) |
| AEC-Q100 Qualified | Yes | No | Yes | Yes | Yes | No |
| DSP Instructions | No | No | No | No | Yes (DSP engine) | Yes (DSP engine) |
Key Differentiators
- AEC-Q100 qualification at +125C with 40 MIPS throughput (vs PIC24HJ128GP204-I/ML)
- Higher Flash density than PIC24HJ64GP204-E/ML (vs PIC24HJ64GP204-E/ML)
- Deterministic 16-bit core without DSP overhead vs dsPIC33FJ128GP204-E/ML (vs dsPIC33FJ128GP204-E/ML)
- QFN-44 with exposed thermal pad improves thermals vs TQFP-44 (vs PIC24HJ128GP204-E/PT)
Design Notes
Place 100 nF X7R decoupling capacitors as close as possible to every VDD/VSS pin pair (pins 11/12, 22/21, 34/33) and one 10 uF bulk tantalum or ceramic near the package. The AVDD/AVSS pins (43/44) powering the ADC should be filtered with an additional ferrite bead or 10 ohm resistor and a separate 100 nF capacitor. Per the manufacturer datasheet section on power-supply design, avoid sharing analog and digital ground returns under the QFN thermal pad; use a star-ground topology with the EP pad tied to clean ground through multiple vias.
The 44-QFN exposed thermal pad (EP) must be soldered to a contiguous copper pour of at least 1 square inch on the top layer, stitched with 0.3 mm thermal vias (9-16 vias) to the inner ground plane to spread switching and core losses. Trace the 40 MHz primary oscillator signals (OSC1 pin 13, OSC2 pin 14) with short, length-matched (<5 mm) traces and a guard ring tied to analog ground. Keep ADC analog traces (AN0-AN9) routed away from PWM switching nodes; the ANx pin group on this package is on the right edge to simplify analog/digital partitioning.
Do not exceed the absolute maximum supply of 4.0 V on VDD even in transients - automotive load-dump events above this require an external TVS diode and series resistor. Always pull MCLR (pin 42) high through a 10 kohm resistor to VDD and add a 100 nF cap to ground to filter ESD-induced resets. The -E suffix is mandatory for AEC-Q100 designs; substituting -I parts in automotive builds invalidates PPAP documentation. Confirm the /ML package code matches your PCB land pattern (8 mm QFN) before ordering.
For PWM-driven motor or power-conversion outputs (PWM1H/L, PWM2H/L on pins 17-20), keep gate-drive traces short and use a 33 ohm source-termination resistor at the MCU pin to dampen ringing into capacitive MOSFET gates. Avoid routing PWM traces adjacent to analog inputs to prevent capacitive crosstalk. The hardware CRC engine should validate all Flash writes during bootloader operations to detect bit-flip events that could corrupt application code in automotive thermal-stress profiles.
Compliance Information
AEC-Q100 qualified per DigiKey listing and Microchip product page. ROHS3 compliant and REACH unaffected per ampheo listing. MSL 1 (no dry-pack required).
