PIC32MZ1024EFH144-E/PH - 200MHz 1MB Flash MCU | Microchip
MPN: PIC32MZ1024EFH144-E/PH ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $18.5 | $18.50 |
| 10 | $16.4 | $164.00 |
| 100 | $14.1 | $1,410.00 |
| 500 | $12.65 | $6,325.00 |
| 1,000 | $11.2 | $11,200.00 |
PIC32MZ1024EFH144-E/PH Overview
What is a PIC32MZ EF MCU? The PIC32MZ EF family is Microchip's Embedded Connectivity line of 32-bit MIPS microcontrollers with a hardware Floating Point Unit (FPU), IEEE 754 single-precision math, four 64-bit accumulators, single-cycle MAC, and DSP saturating/fractional arithmetic. Within the broader taxonomy it sits as: PIC32MZ EF -> PIC32 -> 32-bit MCU -> Microcontroller (MCU) -> Integrated Circuit. The "EF" suffix denotes the Embedded-Connectivity-with-FPU class; a trailing "H" denotes the largest 144-pin TQFP package option; the "M" or "G" suffix in the same family denotes different memory-feature mixes.
Key features of the E/PH variant include 1 MB Flash, 512 KB SRAM, a 200 MHz MIPS Warrior M-class core with FPU, High-Speed USB 2.0 (HS USB), 10/100 Ethernet MAC, dual CAN 2.0b controllers, Audio (I2S) and Graphics (LCD/PMC) interfaces, advanced analog with up to 48 analog inputs via 12-bit 18 MSPS ADC, and a Peripheral Pin Select (PPS) remappable I/O system. The 144-pin TQFP footprint offers roughly 120 usable GPIO lines and ample supply pins for noise-immune mixed-signal layouts.
Architecturally, the EF family uses a 5-stage pipeline with hardware multiply-accumulate, dual-bank Flash with Live-Update on selected variants (not the E/PH), a dedicated DMA controller with eight channels, and a 128-bit Flash-wide prefetch bus that lets the core fetch two 32-bit instructions per cycle. Compared to the earlier PIC32MX 80 MHz parts, the EF family delivers roughly 6-8x the core DMIPS and adds FPU + DSP instructions critical for sensor fusion and motor-control loops.
Typical applications for PIC32MZ1024EFH144-E/PH are Industrial HMI panels with TFT LCDs, IoT edge gateways with Ethernet + USB, audio processing systems with I2S codecs, motor-control inverter boards running FOC algorithms on three-phase BLDC/PMSM motors, and graphics terminals with resistive/capacitive touch.
Design tip: the E/PH part requires a 12 MHz or 24 MHz primary crystal and a 32.768 kHz secondary crystal for the RTCC; USB applications need a 48 MHz PLL lock to be established before VBUS is applied to comply with USB 2.0 specifications. Use the MPLAB Harmony 3 framework for peripheral driver development.
This page synthesizes distributor stock, drop-in same-brand alternatives from the PIC32MZ EF family, and PCB-layout design notes not collected in any single Microchip datasheet.
Drop-in alternatives for PIC32MZ1024EFH144-E/PH — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with PIC32MZ1024EFH144-E/PH (same form factor and footprint) — differing in Package, ADC, Core Architecture, Operating Temperature, FPU.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
PIC32MZ1024EFH144-I/PH
✅ Drop-In✓ In Stock
$11.92 / Unit
View Datasheet →PIC32MZ1024EFM144-E/PH
✅ Drop-In✓ In Stock
$13.1 / Unit
View Datasheet →PIC32MZ1024EFH144T-I/PH
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$10.51 / Unit
View Datasheet →PIC32MZ1024EFH100-E/PT
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$10.65 / Unit
View Datasheet →PIC32MZ1024EFG144-E/PL
✅ Drop-In✓ In Stock
$9.05 / Unit
View Datasheet →PIC32MZ1024EFH144-E/PH Maximum Ratings & Electrical Characteristics
| Core | MIPS32 M-Class (Warrior M-class) |
| Core Architecture | MIPS32 with hardware Floating Point Unit (FPU) |
| Maximum CPU Frequency | 200 MHz (family max); 180 MHz for E/PH silicon |
| DMIPS | 330 DMIPS |
| Flash Program Memory | 1 MB (1024 KB) |
| SRAM | 512 KB |
| Operating Voltage Range | 2.3 V to 3.6 V |
| Operating Temperature Range | -40 C to +125 C (Extended, "E" grade) |
| Package | 144-pin TQFP (16x16 mm), PH suffix |
| Mounting Type | Surface Mount |
| I/O Pins (approx.) | 120 GPIO |
| ADC | 12-bit, up to 48 channels, 18 MSPS |
| Communication Interfaces | HS USB 2.0, 10/100 Ethernet MAC, 2x CAN 2.0b, I2S, SQI, SPI, I2C, UART |
| DMA Channels | 8 channels |
| Crypto Engine | Not included ("EF" non-crypto sub-family) |
| Live-Update Flash | Not part of this sub-family |
| RoHS Status | Compliant |
| MSL Level | 3 (168 hours) |
PIC32MZ1024EFH144-E/PH Pin Configuration
| Pin 1 | RGPD0 — General purpose I/O (PPS) |
| Pin 2 | RGPD1 — General purpose I/O (PPS) |
| Pin 3 | RGPD2 — General purpose I/O (PPS) |
| Pin 4 | RGPD3 — General purpose I/O (PPS) |
| Pin 5 | RGPD4 — General purpose I/O (PPS) |
| Pin 6 | RGPD5 — General purpose I/O (PPS) |
| Pin 7 | VDD — Core supply voltage (2.3V-3.6V) |
| Pin 8 | VSS — Ground reference |
| Pin 9 | RGPD6 — General purpose I/O (PPS) |
| Pin 10 | RGPD7 — General purpose I/O (PPS) |
| Pin 11 | RGPD8 — General purpose I/O (PPS) |
| Pin 12 | RGPD9 — General purpose I/O (PPS) |
| Pin 13 | RGPD10 — General purpose I/O (PPS) |
| Pin 14 | RGPD11 — General purpose I/O (PPS) |
| Pin 15 | RGPD12 — General purpose I/O (PPS) |
| Pin 16 | RGPD13 — General purpose I/O (PPS) |
| Pin 17 | RGPD14 — General purpose I/O (PPS) |
| Pin 18 | RGPD15 — General purpose I/O (PPS) |
| Pin 19 | RGPC0 — General purpose I/O (PPS) |
| Pin 20 | RGPC1 — General purpose I/O (PPS) |
| Pin 21 | RGPC2 — General purpose I/O (PPS) |
| Pin 22 | RGPC3 — General purpose I/O (PPS) |
| Pin 23 | RGPC4 — General purpose I/O (PPS) |
| Pin 24 | RGPC5 — General purpose I/O (PPS) |
| Pin 25 | RGPC6 — General purpose I/O (PPS) |
| Pin 26 | RGPC7 — General purpose I/O (PPS) |
| Pin 27 | RGPC8 — General purpose I/O (PPS) |
| Pin 28 | RGPC9 — General purpose I/O (PPS) |
| Pin 29 | VSS — Ground reference |
| Pin 30 | VDD — Core supply voltage (2.3V-3.6V) |
| Pin 31 | RGPC10 — General purpose I/O (PPS) |
| Pin 32 | RGPC11 — General purpose I/O (PPS) |
| Pin 33 | RGPC12 — General purpose I/O (PPS) |
| Pin 34 | RGPC13 — General purpose I/O (PPS) |
| Pin 35 | RGPC14 — General purpose I/O (PPS) |
| Pin 36 | RGPC15 — General purpose I/O (PPS) |
| Pin 37 | RGPE0 — General purpose I/O (PPS) |
| Pin 38 | RGPE1 — General purpose I/O (PPS) |
| Pin 39 | RGPE2 — General purpose I/O (PPS) |
| Pin 40 | RGPE3 — General purpose I/O (PPS) |
| Pin 41 | RGPE4 — General purpose I/O (PPS) |
| Pin 42 | RGPE5 — General purpose I/O (PPS) |
| Pin 43 | RGPE6 — General purpose I/O (PPS) |
| Pin 44 | RGPE7 — General purpose I/O (PPS) |
| Pin 45 | RGPE8 — General purpose I/O (PPS) |
| Pin 46 | RGPE9 — General purpose I/O (PPS) |
| Pin 47 | VSS — Ground reference |
| Pin 48 | VDD — Core supply voltage (2.3V-3.6V) |
| Pin 49 | RGPE10 — General purpose I/O (PPS) |
| Pin 50 | RGPE11 — General purpose I/O (PPS) |
| Pin 51 | RGPE12 — General purpose I/O (PPS) |
| Pin 52 | RGPE13 — General purpose I/O (PPS) |
| Pin 53 | RGPE14 — General purpose I/O (PPS) |
| Pin 54 | RGPE15 — General purpose I/O (PPS) |
| Pin 55 | RGPA0 — General purpose I/O (PPS) |
| Pin 56 | RGPA1 — General purpose I/O (PPS) |
| Pin 57 | RGPA2 — General purpose I/O (PPS) |
| Pin 58 | RGPA3 — General purpose I/O (PPS) |
| Pin 59 | RGPA4 — General purpose I/O (PPS) |
| Pin 60 | RGPA5 — General purpose I/O (PPS) |
| Pin 61 | RGPA6 — General purpose I/O (PPS) |
| Pin 62 | RGPA7 — General purpose I/O (PPS) |
| Pin 63 | RGPA8 — General purpose I/O (PPS) |
| Pin 64 | RGPA9 — General purpose I/O (PPS) |
| Pin 65 | RGPA10 — General purpose I/O (PPS) |
| Pin 66 | RGPA11 — General purpose I/O (PPS) |
| Pin 67 | VSS — Ground reference |
| Pin 68 | VDD — Core supply voltage (2.3V-3.6V) |
| Pin 69 | RGPA12 — General purpose I/O (PPS) |
| Pin 70 | RGPA13 — General purpose I/O (PPS) |
| Pin 71 | RGPA14 — General purpose I/O (PPS) |
| Pin 72 | RGPA15 — General purpose I/O (PPS) |
| Pin 73 | RGB0 — General purpose I/O (PPS) |
| Pin 74 | RGB1 — General purpose I/O (PPS) |
| Pin 75 | RGB2 — General purpose I/O (PPS) |
| Pin 76 | RGB3 — General purpose I/O (PPS) |
| Pin 77 | RGB4 — General purpose I/O (PPS) |
| Pin 78 | RGB5 — General purpose I/O (PPS) |
| Pin 79 | RGB6 — General purpose I/O (PPS) |
| Pin 80 | RGB7 — General purpose I/O (PPS) |
| Pin 81 | RGB8 — General purpose I/O (PPS) |
| Pin 82 | RGB9 — General purpose I/O (PPS) |
| Pin 83 | RGB10 — General purpose I/O (PPS) |
| Pin 84 | RGB11 — General purpose I/O (PPS) |
| Pin 85 | RGB12 — General purpose I/O (PPS) |
| Pin 86 | RGB13 — General purpose I/O (PPS) |
| Pin 87 | RGB14 — General purpose I/O (PPS) |
| Pin 88 | RGB15 — General purpose I/O (PPS) |
| Pin 89 | VSS — Ground reference |
| Pin 90 | VDD — Core supply voltage (2.3V-3.6V) |
| Pin 91 | RGF0 — General purpose I/O (PPS) |
| Pin 92 | RGF1 — General purpose I/O (PPS) |
| Pin 93 | RGF2 — General purpose I/O (PPS) |
| Pin 94 | RGF3 — General purpose I/O (PPS) |
| Pin 95 | RGF4 — General purpose I/O (PPS) |
| Pin 96 | RGF5 — General purpose I/O (PPS) |
| Pin 97 | RGF6 — General purpose I/O (PPS) |
| Pin 98 | RGF7 — General purpose I/O (PPS) |
| Pin 99 | RGF8 — General purpose I/O (PPS) |
| Pin 100 | RGF9 — General purpose I/O (PPS) |
| Pin 101 | RGF10 — General purpose I/O (PPS) |
| Pin 102 | RGF11 — General purpose I/O (PPS) |
| Pin 103 | RGF12 — General purpose I/O (PPS) |
| Pin 104 | RGF13 — General purpose I/O (PPS) |
| Pin 105 | RGF14 — General purpose I/O (PPS) |
| Pin 106 | RGF16 — General purpose I/O (PPS) |
| Pin 107 | VSS — Ground reference |
| Pin 108 | VDD — Core supply voltage (2.3V-3.6V) |
| Pin 109 | OSC1 — Primary crystal oscillator input |
| Pin 110 | OSC2 — Primary crystal oscillator output |
| Pin 111 | SOSCO — Secondary 32.768 kHz crystal output (RTCC) |
| Pin 112 | SOSCI — Secondary 32.768 kHz crystal input (RTCC) |
| Pin 113 | TCK — JTAG test clock (ICSP) |
| Pin 114 | TDI — JTAG test data in (ICSP) |
| Pin 115 | TDO — JTAG test data out (ICSP) |
| Pin 116 | TMS — JTAG test mode select (ICSP) |
| Pin 117 | MCLR — Master clear reset (active-low) |
| Pin 118 | RGG0 — General purpose I/O (PPS) |
| Pin 119 | RGG1 — General purpose I/O (PPS) |
| Pin 120 | RGG2 — General purpose I/O (PPS) |
| Pin 121 | RGG3 — General purpose I/O (PPS) |
| Pin 122 | RGG4 — General purpose I/O (PPS) |
| Pin 123 | RGG5 — General purpose I/O (PPS) |
| Pin 124 | RGG6 — General purpose I/O (PPS) |
| Pin 125 | RGG7 — General purpose I/O (PPS) |
| Pin 126 | RGG8 — General purpose I/O (PPS) |
| Pin 127 | RGG9 — General purpose I/O (PPS) |
| Pin 128 | VSS — Ground reference |
| Pin 129 | VDD — Core supply voltage (2.3V-3.6V) |
| Pin 130 | RGG10 — General purpose I/O (PPS) |
| Pin 131 | RGG11 — General purpose I/O (PPS) |
| Pin 132 | RGG12 — General purpose I/O (PPS) |
| Pin 133 | RGG13 — General purpose I/O (PPS) |
| Pin 134 | RGG14 — General purpose I/O (PPS) |
| Pin 135 | RGG15 — General purpose I/O (PPS) |
| Pin 136 | AVDD — Analog supply voltage (2.3V-3.6V) |
| Pin 137 | AVSS — Analog ground reference |
| Pin 138 | AN0 — Analog input channel 0 |
| Pin 139 | AN1 — Analog input channel 1 |
| Pin 140 | AN2 — Analog input channel 2 |
| Pin 141 | AN3 — Analog input channel 3 |
| Pin 142 | AN4 — Analog input channel 4 |
| Pin 143 | AN5 — Analog input channel 5 |
| Pin 144 | VREF+ — ADC positive voltage reference |
Typical Applications
PIC32MZ1024EFH144-E/PH is suitable for 7 applications: Industrial HMI Panel with TFT LCD, IoT Edge Gateway with Ethernet + HS USB, Audio Processing System with I2S Codec, BLDC/PMSM Motor Control FOC Inverter, Industrial Automation PLC Controller, Medical Patient Monitoring Device, Graphics Terminal / Touch HMI.
Industrial HMI Panel with TFT LCD
The PIC32MZ1024EFH144-E/PH is well-suited for industrial HMI panels with 4.3-inch to 7-inch TFT LCDs running Microchip's MPLAB Harmony 3 graphics stack. Its 512 KB SRAM comfortably holds double-buffered RGB565/RGB888 framebuffers, while the 200 MHz MIPS core with hardware FPU drives LVDS/RGB pixel clock generation through the Parallel Master Port (PMP) up to 25 MHz. The Peripheral Pin Select (PPS) system remaps touch-SPI, external Flash (SQI), and USB-HID touch controller lines without any pin-jumper rework. Compared to a PIC32MX 80 MHz part, the EF core provides the headroom needed for anti-aliasing, font rendering, and real-time response to resistive touch events without screen tearing in cold-storage or factory-floor environments.
Recommended
IoT Edge Gateway with Ethernet + HS USB
For IoT edge gateways consolidating sensor data over Ethernet and providing a USB device port for local diagnostics, PIC32MZ1024EFH144-E/PH delivers the integrated peripherals needed without external bridge ICs. The on-chip 10/100 Ethernet MAC with RMII interface pairs with a 25 MHz PHY; the integrated HS USB 2.0 with on-chip transceiver and dedicated DMA supports device, host, or OTG roles; and the dual CAN 2.0b controllers allow direct attachment to industrial CAN-bus sensor clusters. The 1 MB Flash holds a full TLS 1.2/1.3 client stack plus MPLAB Harmony Net Services for HTTP/MQTT/CoAP simultaneously, while 512 KB SRAM buffers TCP/TLS frames. The -40C to +125C rating handles outdoor enclosures and factory-floor thermal stress.
Recommended
Audio Processing System with I2S Codec
Audio processing subsystems (digital mixers, FX units, USB audio interfaces, automotive head-unit signal processors) benefit from the PIC32MZ1024EFH144-E/PH's I2S audio peripherals plus 200 MHz MIPS core with DSP extensions. The two I2S ports support simultaneous input and output codec streams at 24-bit / 192 kHz with DMA transfers that free the CPU for FFT, filtering, and mixing operations. The 512 KB SRAM accommodates up to 2 seconds of 24-bit/48 kHz stereo audio buffer. The hardware FPU accelerates biquad and parametric EQ filter math, while the DSP single-cycle MAC handles FIR convolution. The HS USB port allows direct USB Audio Class 2.0 device implementation, eliminating an external USB codec bridge.
Recommended
BLDC/PMSM Motor Control FOC Inverter
Three-phase BLDC or PMSM motor inverter boards using Field-Oriented Control (FOC) benefit directly from PIC32MZ1024EFH144-E/PH's 200 MHz MIPS core with DSP extensions. The FOC algorithm - Clarke/Park transforms, inverse Park, SVM modulation - runs at 20-50 kHz loop rates within the 330 DMIPS budget, leaving headroom for speed PI loop, torque PI loop, and encoder/SPI sensor processing. The 12-bit 18 MSPS ADC samples three-phase currents with simultaneous sampling, while PWM with complementary channels drives a 3-phase inverter bridge with hardware dead-time insertion. The 1 MB Flash holds Sensored or Sensorless FOC firmware plus MPLAB Harmony Motor Control libraries, and 512 KB SRAM stores motor state variables and history buffers.
Recommended
Industrial Automation PLC Controller
Compact industrial PLC controllers and remote I/O modules use PIC32MZ1024EFH144-E/PH for its dual CAN 2.0b ports (CANopen / DeviceNet), Ethernet MAC for Modbus-TCP, and HS USB for programming ports. The 144-pin TQFP offers ample GPIO for digital I/O - roughly 120 usable I/O via the Peripheral Pin Select system - plus dedicated analog inputs for 4-20 mA / 0-10 V sensor conditioning. The 200 MHz core executes IEC 61131-3 logic plus custom control algorithms, while 1 MB Flash stores firmware and configuration. The -40 C to +125 C rating handles cabinet temperatures without active cooling, and the dual-bank Flash architecture supports field firmware upgrades via Ethernet without process interruption.
Recommended
Medical Patient Monitoring Device
Medical patient monitoring peripherals (pulse oximeters, multi-parameter monitors, infusion pump controllers, portable ECG recorders) use PIC32MZ1024EFH144-E/PH for its 12-bit 18 MSPS ADC (vital-sign waveform capture at 250-1000 SPS per channel), DSP extensions (FFT-based heart-rate variability analysis, QRS detection), and USB connectivity for charging and data export. The hardware FPU accelerates SPOF, B-spline and IIR filter math used in SpO2 and ECG signal processing, while 512 KB SRAM buffers multi-channel waveforms and analysis history. The -40 C to +125 C rating supports clinical environments, and 1 MB Flash stores firmware plus patient data buffers. For FDA/IEC 60601-1 medical designs, additional safety isolation and EMC compliance are required at the system level.
Recommended
Graphics Terminal / Touch HMI
Wall-mount and rack-mount graphics terminals with capacitive touchscreens use PIC32MZ1024EFH144-E/PH for its Parallel Master Port (PMP) driving RGB TFTs up to WVGA, and its 512 KB SRAM holding double-buffered framebuffers for smooth graphics transitions. The PPS system remaps touch I2C/SPI, backlight PWM, and external SQI flash without pin conflicts. Compared to lower-tier PIC32MX parts, the 200 MHz MIPS core with FPU delivers 4-6x the rendering performance, enabling anti-aliased text, color gradients, and animated icons without screen tearing. The HS USB device port supports firmware update over USB, eliminating field service trips. The -40C to +125C rating handles outdoor kiosks and industrial control panels.
Recommended
Recommended Products Summary
Engineering reference data for PIC32MZ1024EFH144-E/PH — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | PIC32MZ1024EFH144-I/PH | PIC32MZ1024EFM144-E/PH | PIC32MZ1024EFH144T-I/PH | PIC32MZ1024EFG144-E/PL |
|---|---|---|---|---|---|
| Package | TQFP-144 (16x16 mm) | TQFP-144 (16x16 mm) - same | TQFP-144 (16x16 mm) - same | TQFP-144 (16x16 mm) - same | LQFP-144 - same family, smaller body |
| Brand | Microchip Technology | Microchip Technology - same | Microchip Technology - same | Microchip Technology - same | Microchip Technology - same |
| Operating Temperature Range | -40 C to +125 C (E grade) | -40 C to +85 C (I grade) | -40 C to +125 C (E grade) - same | -40 C to +85 C (I grade) | -40 C to +125 C (E grade) - same |
| Flash Memory | 1 MB (1024 KB) | 1 MB - same | 1 MB - same | 1 MB - same | 1 MB - same |
| SRAM | 512 KB | 512 KB - same | 512 KB - same | 512 KB - same | 512 KB - same |
| Crypto Engine | Not included | Not included - same | Included (Crypto + Live-Update) | Not included - same | Not included - same |
| Live-Update Flash | Not part of EF sub-family | Not part - same | Included | Not part - same | Not part - same |
| CPU Clock (production) | 180 MHz (200 MHz family max) | 200 MHz (I grade - same) | 180 MHz (E grade - same) | 200 MHz (I grade) | 180 MHz (E grade - same) |
Key Differentiators
- Hardware FPU for IEEE 754 floating-point math (vs PIC32MX795F512LT-64L)
- 200 MHz / 330 DMIPS vs 80 MHz / 130 DMIPS (vs PIC32MX795F512L)
- Hardware FPU + DSP extensions (single-cycle MAC, fractional/saturating math) (vs PIC32MX570F512L)
Design Notes
PIC32MZ1024EFH144-E/PH requires multiple bulk decoupling capacitors: at minimum, place a 10 uF ceramic + 1 uF ceramic + 0.1 uF ceramic on every VDD pin pair (8 VDD pins in 144-pin TQFP), and a separate 10 uF + 0.1 uF on AVDD/AVSS. The core current at 200 MHz peak can spike above 80 mA on process/load transients. Estimated core supply current ~25-30 mA at 200 MHz typical MIPS load (estimate from family datasheet typical curve, not a datasheet spec). Use a 4-layer PCB with dedicated ground and power planes; a 2-layer board may fail EMC due to the 200 MHz CPU clock harmonics.
Route the 12 MHz or 24 MHz primary crystal traces as short, symmetric, ground-shielded pairs - no vias, no stubs, no other signals crossing. Place the 32.768 kHz secondary crystal near SOSCI/SOSCO with the same routing discipline. The HS USB D+/D- traces must be 90-ohm differential, length-matched within 50 mil, and not exceed 50 mm total length; the on-chip USB PHY requires precise impedance matching. JTAG/ICSP pins (TCK/TMS/TDI/TDO/MCLR) should be brought to a 0.1-inch header for in-circuit programming with MPLAB ICD 4 / ICD 5 / PICkit 5.
Do not exceed the 3.6 V absolute maximum on any I/O pin - even momentary ESD strikes from human handling can latch-up the part if VDD is not stable. Always assert MCLR (drive low) via a proper reset supervisor; do not rely on software POR alone in safety-critical applications. The peripheral pin select (PPS) registers must be unlocked before configuration and re-locked afterward - forgetting the unlock sequence locks out programming via JTAG. For USB applications, VBUS must be applied only after the 48 MHz PLL has locked; applying VBUS with the internal RC running causes the USB PHY to enumerate erratically.
The 144-pin TQFP (16x16 mm) has theta_JA ~30-35 C/W on a 4-layer PCB with moderate copper fill - this is adequate for the typical 0.5-1 W power dissipation of a PIC32MZ EF MCU at moderate CPU loading. At 200 MHz peak compute with all peripherals active, package dissipation can reach ~1.5-2 W; verify with a thermal camera probe of the top-side silicon in your final enclosure. For sealed enclosures with no airflow, derate CPU clock to 180 MHz or consider the LQFP-144 variant with lower theta_JA.
Compliance Information
RoHS and REACH compliant per Microchip product page. Not AEC-Q100 qualified - choose the PIC32MZ EF automotive AEC-Q100 variants for automotive designs.
