S29GL128S90TFI020 - 128Mb 3V 90ns Parallel NOR Flash | Infineon
MPN: S29GL128S90TFI020 ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $4.5 | $4.50 |
| 10 | $4.05 | $40.50 |
| 100 | $3.62 | $362.00 |
| 500 | $3.2 | $1,600.00 |
| 1,000 | $2.85 | $2,850.00 |
S29GL128S90TFI020 Overview
A NOR Flash is a non-volatile memory technology that stores data in floating-gate cells arranged in a parallel (NOR) array, providing fast random read access at the cost of slower writes and lower density than NAND. It sits in the hierarchy: NOR Flash -> non-volatile memory -> semiconductor memory -> integrated circuit. NOR Flash is the technology of choice for boot ROM, firmware storage, and applications that demand byte-level random read with deterministic latency.
Key features of the S29GL128S90TFI020 include a 90 ns initial random access time, page-mode read access of approximately 25 ns after the first byte, a 512-byte write buffer that accelerates programming to a typical 0.46 ms per page, and a uniform 64 KB sector architecture for erase operations. The device operates from a single 2.7 V to 3.6 V supply, supports JEDEC-compatible command sets, and offers hardware sector protection with a WP# pin. It is qualified for industrial temperature range (-40 C to +85 C).
The 90 nm MIRRORBIT™ cell stores two bits per cell (a charge-trapping architecture), enabling a 128 Mb density in a compact TSOP-56 outline without sacrificing the read performance and reliability associated with NOR. Hardware features include ACC pin acceleration for faster factory programming, a 100K erase-cycle endurance guarantee per sector, and 20+ year data retention. The Common Flash Interface (CFI) allows the host to query geometry and timing parameters at runtime, simplifying firmware portability across the S29GL-S family.
Typical applications include automotive infotainment boot and code storage, industrial router firmware, point-of-sale terminals, networking line cards, set-top box operating system images, and any embedded system that requires XIP (execute-in-place) boot directly from flash. The wide voltage range and industrial temperature grade also suit outdoor telecom and metering installations.
Design considerations: Use a 0.1 uF decoupling capacitor close to VCC and VSS pins; route the 16-bit data bus with matched trace lengths if used in burst-mode. WP# should be tied high during normal operation; ACC must be held low (≤ VHH) in field to prevent accidental factory-mode entry.
This page synthesizes Infineon product-page specifications, distributor pricing, drop-in alternatives drawn from the S29GL-S family, and practical design notes that go beyond the manufacturer datasheet's typical application circuit. Sources are cited inline so engineers can verify each parameter against the original documentation.
Drop-in alternatives for S29GL128S90TFI020 — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
S29GL128S90TFI010
✅ Drop-In📋 Reference alternative (not in catalog)
S29GL128S90TFI023
✅ Drop-In📋 Reference alternative (not in catalog)
S29GL128S10TFI020
✅ Drop-In📋 Reference alternative (not in catalog)
S29GL128S70TFI020
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
MX29LV128DT2I-70G
✅ Drop-In📋 Reference alternative (not in catalog)
S29GL128S90TFI020 Maximum Ratings & Electrical Characteristics
| Density | 128 Mb |
| Memory Organization | 8M x 16 bit |
| Technology | NOR Flash (MIRRORBIT™) |
| Supply Voltage (VCC) | 2.7 V to 3.6 V |
| Initial Random Access Time | 90 ns |
| Page Mode Access Time | 25 ns (typical, after first byte) |
| Sector Size | 64 KB (uniform sectors) |
| Write Buffer Size | 512 bytes |
| Endurance | 100,000 erase cycles per sector (minimum) |
| Interface | Parallel (x16) |
| Operating Temperature | -40 C to +85 C (Industrial) |
| Package | 56-pin TSOP I |
| Mounting Type | Surface Mount |
| Automotive Qualified | No (Industrial grade) |
| RoHS Status | Compliant |
S29GL128S90TFI020 Pin Configuration
| Pin 1 | NC — Not connected (per datasheet) |
| Pin 2 | NC — Not connected (per datasheet) |
| Pin 3 | NC — Not connected (per datasheet) |
| Pin 4 | NC — Not connected (per datasheet) |
| Pin 5 | NC — Not connected (per datasheet) |
| Pin 6 | NC — Not connected (per datasheet) |
| Pin 7 | RESET# — Hardware reset, active low |
| Pin 8 | WP#/ACC — Write protect / accelerated programming |
| Pin 9 | RY/BY# — Ready/Busy output, active low |
| Pin 10 | A22 — Address line 22 |
| Pin 11 | A21 — Address line 21 |
| Pin 12 | A20 — Address line 20 |
| Pin 13 | A19 — Address line 19 |
| Pin 14 | A18 — Address line 18 |
| Pin 15 | A17 — Address line 17 |
| Pin 16 | A16 — Address line 16 |
| Pin 17 | A15 — Address line 15 |
| Pin 18 | A14 — Address line 14 |
| Pin 19 | A13 — Address line 13 |
| Pin 20 | A12 — Address line 12 |
| Pin 21 | A11 — Address line 11 |
| Pin 22 | A10 — Address line 10 |
| Pin 23 | A9 — Address line 9 |
| Pin 24 | A8 — Address line 8 |
| Pin 25 | A7 — Address line 7 |
| Pin 26 | A6 — Address line 6 |
| Pin 27 | A5 — Address line 5 |
| Pin 28 | A4 — Address line 4 |
| Pin 29 | A3 — Address line 3 |
| Pin 30 | A2 — Address line 2 |
| Pin 31 | A1 — Address line 1 |
| Pin 32 | A0 — Address line 0 |
| Pin 33 | CE# — Chip enable, active low |
| Pin 34 | GND — Ground reference |
| Pin 35 | OE# — Output enable, active low |
| Pin 36 | DQ0 — Data I/O line 0 |
| Pin 37 | DQ1 — Data I/O line 1 |
| Pin 38 | DQ2 — Data I/O line 2 |
| Pin 39 | DQ3 — Data I/O line 3 |
| Pin 40 | DQ4 — Data I/O line 4 |
| Pin 41 | DQ5 — Data I/O line 5 |
| Pin 42 | DQ6 — Data I/O line 6 |
| Pin 43 | DQ7 — Data I/O line 7 |
| Pin 44 | DQ8 — Data I/O line 8 (x16 mode) |
| Pin 45 | DQ9 — Data I/O line 9 (x16 mode) |
| Pin 46 | DQ10 — Data I/O line 10 (x16 mode) |
| Pin 47 | DQ11 — Data I/O line 11 (x16 mode) |
| Pin 48 | DQ12 — Data I/O line 12 (x16 mode) |
| Pin 49 | DQ13 — Data I/O line 13 (x16 mode) |
| Pin 50 | DQ14 — Data I/O line 14 (x16 mode) |
| Pin 51 | DQ15 — Data I/O line 15 (x16 mode) |
| Pin 52 | GND — Ground reference |
| Pin 53 | BYTE# — x8 / x16 mode select (where applicable) |
| Pin 54 | WE# — Write enable, active low |
| Pin 55 | VCC — Power supply (2.7-3.6 V) |
| Pin 56 | VCC — Power supply (2.7-3.6 V) |
Typical Applications
S29GL128S90TFI020 is suitable for 7 applications: Industrial Router Firmware Storage, Automotive Infotainment Boot ROM, Point-of-Sale Terminal Firmware, Set-Top Box Operating System Storage, Networking Line Card Boot Image, Industrial Metering and Data Logger, Embedded Linux Bootloader and Recovery Partition.
Industrial Router Firmware Storage
The S29GL128S90TFI020 is well-suited for industrial router firmware storage thanks to its 128 Mb (16 MB) capacity, which fits full router OS images, and its 90 ns initial access plus 25 ns page-mode read latency, which lets the SoC execute-in-place (XIP) directly from flash during cold-boot without staging to DRAM. The 2.7-3.6 V supply range aligns with standard 3.3 V router power rails, while the industrial -40 C to +85 C temperature grade supports outdoor and cabinet installations. With 100,000 erase-cycle endurance per sector, firmware update cycles over the device's lifetime are well covered. Place a 0.1 uF decoupling capacitor adjacent to VCC/VSS pairs and keep the 16-bit data bus trace lengths matched to preserve timing margins under burst reads.
Recommended
Automotive Infotainment Boot ROM
Although the standard S29GL128S90TFI020 is industrial-grade (not AEC-Q100), the same silicon in a -Q1 suffix variant is widely used for automotive infotainment boot ROM because the 128 Mb capacity stores the IVI base image, the 90 ns access time ensures cold-boot latency budgets are met, and the TSOP-56 outline simplifies PCB layout under the head-unit chassis. The page-mode feature accelerates sequential code fetches by roughly 3-4x, smoothing graphics-renderer startup. Designers should verify AEC-Q100 documentation for the specific -Q1 ordering code with Infineon and consider the WP# pin for protection against accidental firmware corruption during service. Always include JTAG or boundary-scan access for factory programming.
Recommended
Point-of-Sale Terminal Firmware
POS terminals benefit from the S29GL128S90TFI020's deterministic 90 ns read latency and 64 KB uniform sector architecture, which simplifies firmware update handling for EMV kernels, payment libraries, and OS images. The 512-byte write buffer accelerates batch programming during factory provisioning, cutting per-unit programming time by an order of magnitude compared to byte-programmed legacy parts. The 100K erase-cycle endurance easily covers daily firmware update cycles over a 10-year POS service life. Industrial temperature rating suits kiosk installations, and the 56-pin TSOP package fits the compact mainboards common in modern slim-line POS hardware. The 3.3 V interface eliminates the legacy 12 V VPP rail, simplifying power supply design.
Recommended
Set-Top Box Operating System Storage
The S29GL128S90TFI020 is ideal for set-top box operating system storage, holding the Linux kernel, root filesystem, and bootloader in a single 128 Mb device with predictable 90 ns random reads that enable fast channel-zap startup times. The page-mode reads at ~25 ns sustain streaming scenarios where the SoC fetches code sequentially while a media pipeline operates in parallel. Its 64 KB uniform sectors align well with JFFS2/UBI erase-block sizes, simplifying filesystem wear-levelling decisions. The wide 2.7-3.6 V supply tolerance handles voltage transients on the back-end of the STB's 12 V-to-3.3 V buck converter without requiring additional regulation.
Recommended
Networking Line Card Boot Image
In networking line cards, the S29GL128S90TFI020 serves as a robust boot-image store where the deterministic 90 ns access supports rapid power-on-self-test (POST) execution by the line-card CPU. Its 16 MB capacity accommodates multi-stage bootloaders, FPGA bitstreams, and recovery images for line-card ASICs. Industrial temperature grading ensures operation in climate-controlled but warm telco closet environments, while the 100K erase-cycle endurance supports repeated firmware QA cycles during the card's deployment lifetime. Hardware sector protection via the WP# pin prevents accidental in-field overwrites during diagnostics, and the JEDEC-standard command set keeps the bootloader portable across the broader GL-S family.
Recommended
Industrial Metering and Data Logger
The S29GL128S90TFI020 is well-suited for industrial metering and data logger applications because its 128 Mb capacity stores months of measurement history alongside the metering firmware, and its industrial -40 C to +85 C temperature range supports outdoor and meter-cabinet installations. The 64 KB uniform sector architecture maps cleanly to log-file erase cycles, and the 100K erase-cycle endurance per sector handles frequent rotation of log blocks. The 90 ns random read latency keeps real-time metering calculations deterministic, while the single 3.3 V supply simplifies solar/battery-powered meter designs. Pair with a low-power MCU such as a PIC24 for a complete metering solution.
Recommended
Embedded Linux Bootloader and Recovery Partition
The S29GL128S90TFI020 acts as the primary bootloader and recovery-image store in embedded Linux systems, where its 8M x 16 organization aligns with the half-word access patterns of ARM Cortex-A bootloaders, and the 90 ns access time keeps U-Boot SPL execution under tight boot-deadline budgets. The Common Flash Interface (CFI) query mechanism allows U-Boot to auto-detect geometry and timing parameters, reducing board-specific porting effort. Holding the WP# pin high during normal operation prevents accidental bootloader corruption. For fail-safe field updates, partition the device into bootloader, kernel, and recovery-image regions across uniform 64 KB sectors, using the JEDEC-standard unlock-bypass command for fast updates.
Recommended
Recommended Products Summary
Engineering reference data for S29GL128S90TFI020 — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | S29GL128S90TFI010 | S29GL128S90TFI023 | S29GL128S10TFI020 | S29GL128S70TFI020 | MX29LV128DT2I-70G |
|---|---|---|---|---|---|---|
| Package | TSOP-56 | TSOP-56 - same | TSOP-56 - same | TSOP-56 - same | TSOP-56 - same | TSOP-56 - same |
| Brand | Infineon | Infineon | Infineon | Infineon | Infineon | Macronix |
| Density | 128 Mb | 128 Mb | 128 Mb | 128 Mb | 128 Mb | 128 Mb |
| Initial Access Time | 90 ns | 90 ns | 90 ns | 100 ns | 70 ns | 70 ns |
| Supply Voltage | 2.7 V to 3.6 V | 2.7 V to 3.6 V | 2.7 V to 3.6 V | 2.7 V to 3.6 V | 2.7 V to 3.6 V | 2.7 V to 3.6 V |
| Temperature Grade | Industrial (-40 to +85 C) | Industrial | Industrial | Industrial | Industrial | Industrial |
| RoHS Compliance | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant |
Key Differentiators
- MIRRORBIT 90 nm process technology (vs Macronix MX29LV128DT2I-70G)
- Faster 100 ns speed-bin sibling available (vs S29GL128S10TFI020)
- Common Flash Interface (CFI) query support (vs S29GL128S90TFI010)
Design Notes
Place a 0.1 uF decoupling capacitor within 5 mm of each VCC/VSS pin pair on the S29GL128S90TFI020. Use a low-ESR ceramic (X7R or X5R) and avoid sharing the capacitor with other high-current loads. During program and erase operations the device draws peak currents of 30-50 mA; a bulk 4.7 uF tantalum or ceramic on the VCC plane prevents VCC droop that could otherwise cause erase or program failures. Estimated: based on typical read ICC of 25 mA active and 50 mA program/erase from the Infineon S29GL-S family datasheet DC characteristics table.
Route the 16-bit data bus (DQ0-DQ15) and the lower address lines (A0-A7) with matched trace lengths within 25 mm to preserve timing margins under page-mode reads. Keep the CE#, OE#, and WE# control signals away from switching power traces to avoid coupling noise that could cause spurious reads or writes. The TSOP-56 package has a 0.5 mm pitch - use 0.2 mm/0.2 mm trace-and-space with a 0.5 mm via drill for fan-out, and provide a continuous ground plane beneath the device for thermal and EMI performance.
Do not leave the WP#/ACC pin floating - tie it high via a 10 kohm pull-up to VCC to prevent accidental factory-mode (ACC) entry, which would lock the device until power-cycle. Similarly, hold RESET# high via a 10 kohm pull-up; a floating RESET# can cause boot failures in electrically noisy environments. When migrating from the older S29GL128P family to the S29GL128S, note that BYTE# mode (x8/x16) is not supported on this suffix; verify that your host bus is x16 before substituting.
Compliance Information
Standard S29GL128S90TFI020 is industrial-grade (not AEC-Q100). For AEC-Q100 automotive applications, specify the -Q1 suffix variant. RoHS compliance confirmed via DigiKey product page listing.
