THS4031CDGNR - 100MHz Low-Noise Op Amp | Texas Instruments
MPN: THS4031CDGNR β Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $2.6 | $2.60 |
| 10 | $2.34 | $23.40 |
| 100 | $2.05 | $205.00 |
| 500 | $1.82 | $910.00 |
| 1,000 | $1.62 | $1,620.00 |
Drop-in alternatives for THS4031CDGNR β same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool β Select alternative parts for side-by-side comparison:
THS4031IDGNR
β Drop-Inβ In Stock
$2.78 / Unit
View Datasheet βTHS4031CDGNG4
β Drop-Inπ Reference alternative (not in catalog)
THS4031CDGN
β Drop-In β οΈ εζ°εΎ ιͺθ―π Reference alternative (not in catalog)
THS4031CDGNR Maximum Ratings & Electrical Characteristics
| Amplifier Type | Voltage Feedback |
| Channels | 1 |
| Bandwidth | 100 MHz (G = 2) |
| Slew Rate | 100 V/us |
| Input Voltage Noise | 1.6 nV/Hz |
| Settling Time (0.1%) | 60 ns |
| THD | -72 dBc at 1 MHz |
| Output Current | 90 mA |
| Input Offset Voltage (Typ) | 0.5 mV |
| Input Offset Voltage (Max) | 2 mV |
| Supply Voltage Range | Β±4.5 V to Β±16 V |
| Stability | Stable in gains of -1 V/V or greater |
| Operating Temperature (C grade) | 0C to +70C |
| Package | 8-Pin MSOP (DGN / HVSSOP with PowerPAD) |
| Mounting Type | Surface Mount |
| Technology | Bipolar |
| Category | Linear - Amplifiers - Instrumentation, Op Amps, Buffer Amps |
THS4031CDGNR Pin Configuration
| Pin 1 | NC β Not connected (per datasheet) |
| Pin 2 | IN- β Inverting input |
| Pin 3 | IN+ β Non-inverting input |
| Pin 4 | V- β Negative supply |
| Pin 5 | NC β Not connected (per datasheet) |
| Pin 6 | OUT β Amplifier output |
| Pin 7 | V+ β Positive supply |
| Pin 8 | NC β Not connected (per datasheet); PowerPAD on underside is ground and must be soldered to PCB ground pour |
Safe Operating Area (SOA) & Thermal Characteristics
No official SOA curve available for this component. Always operate within absolute maximum ratings specified in the datasheet. Ensure adequate cooling and derate as needed.
Typical Applications
THS4031CDGNR is suitable for 6 applications: Communications Receiver Front End, Imaging Signal Chains, ADC Input Buffering, Test and Measurement Instrumentation, IF and RF Gain Blocks, DAC Output Buffering and Signal Reconstruction.
Communications Receiver Front End
The THS4031CDGNR fits communications receiver front ends because its 1.6 nV/Hz input voltage noise preserves the signal-to-noise ratio of low-impedance IF and baseband signals, while the 100 MHz bandwidth at G = 2 covers wideband IF channels with margin. In a typical stage the amplifier sits between the mixer output and the ADC or filter, configured for a gain of 2 to 10 with feedback resistors of 300 to 600 ohms so resistor noise stays well below the amplifier noise floor. The 100 V/us slew rate prevents slew-induced distortion on large IF carriers, and -72 dBc THD at 1 MHz keeps harmonics below the receiver dynamic range budget. Powered from Β±5 V rails, the 90 mA output drive easily back-terminates 50-ohm coaxial distribution within a receiver chain.
Recommended
Imaging Signal Chains
TI explicitly positions the THS403x family for imaging applications, and the THS4031CDGNR delivers the combination those systems need: ultra-low 1.6 nV/Hz noise for weak sensor signals, 100 MHz bandwidth for fast pixel-rate video or ultrasound channels, and 60 ns settling to 0.1% for accurate sampling at high pixel or line rates. In ultrasound and CCD/CMOS imaging front ends the amplifier buffers the detector output before the ADC, where its low noise directly improves image contrast at low light or low echo levels. The bipolar input stage keeps bias-induced offsets small, and the 0.5 mV typical offset simplifies DC-coupled designs with modest digital trimming. The PowerPAD MSOP-8 package lets many channels share dense board area with a shared ground pour for thermal management.
Recommended
ADC Input Buffering
As an ADC driver, the THS4031CDGNR combines 100 MHz bandwidth, 100 V/us slew rate, and 90 mA output current to charge the switched-capacitor input of medium-speed converters without excessive droop or settling error. Its 60 ns settling time to 0.1% must be compared with the ADC acquisition window; for converters sampling at or below roughly 10 to 20 MSPS with adequate aperture time, the amplifier settles well within budget. The 1.6 nV/Hz noise contribution stays far below the quantization noise floor of 12-bit and higher converters in a matched-impedance design, and -72 dBc THD at 1 MHz preserves spurious-free dynamic range. Place a small series resistor at the amplifier output to isolate the switched-capacitor kickback, and keep feedback resistors low for stability.
Recommended
Test and Measurement Instrumentation
Bench and modular instruments benefit from the THS4031CDGNR's Β±4.5 V to Β±16 V supply range, which matches classic Β±15 V analog rails in oscilloscope front ends, signal generators, and data-acquisition modules. The 100 MHz bandwidth supports front-panel signal conditioning ahead of faster attenuator and digitizer stages, while the 1.6 nV/Hz noise keeps the instrument noise floor low enough for small-signal measurements. The 90 mA output drive powers 50-ohm source-impedance outputs specified into matched loads, and the -72 dBc distortion at 1 MHz maintains waveform fidelity for harmonic-sensitive tests. Because the C grade covers 0C to +70C, it suits bench instruments; select the THS4031IDGNR for module variants rated to -40C to +85C.
Recommended
IF and RF Gain Blocks
Intermediate-frequency stages in radios and radar receivers use the THS4031CDGNR as a voltage-feedback gain block where the 100 MHz bandwidth covers common IFs of 10.7 MHz, 21.4 MHz, 70 MHz, and 140 MHz with usable closed-loop gain. The 1.6 nV/Hz input noise translates to a low noise figure when the amplifier is preceded by matching attenuation or a filter with a low source impedance, and the -72 dBc THD at 1 MHz limits intermodulation artifacts in multi-carrier IFs. The device is specified stable at gains of -1 V/V or greater, so it can also serve as an inverting summing amplifier for AGC injection. With Β±5 V to Β±15 V supplies, gain-set resistors of a few hundred ohms, and RF layout practice, the stage integrates cleanly into stripline boards.
Recommended
DAC Output Buffering and Signal Reconstruction
After a high-speed DAC, the THS4031CDGNR acts as a low-noise reconstruction and output buffer, converting the DAC's current or voltage output into a low-impedance drive for filters, cables, or modulators. Its 100 MHz bandwidth passes fast edges and wide reconstructed bands without slewing, the 100 V/us slew rate accommodates multi-volt full-scale transitions at megahertz update rates, and the 1.6 nV/Hz noise adds negligible noise to the converter's own output-referred noise. The 90 mA output current drives 50-ohm back-terminated loads directly, and the Β±4.5 V to Β±16 V supply range supports Β±5 V, Β±12 V, and Β±15 V DAC reference systems. Configure as an inverting transimpedance stage for current-output DACs, keeping feedback resistance moderate to preserve bandwidth and phase margin.
Recommended
Recommended Products Summary
Engineering reference data for THS4031CDGNR β comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | THS4031IDGNR | THS4031CDGNG4 | THS4031CDGN |
|---|---|---|---|---|
| Package | 8-Pin MSOP (DGN, PowerPAD) | 8-Pin MSOP (DGN, PowerPAD) - same | 8-Pin MSOP (DGN, PowerPAD) - same | 8-Pin MSOP (DGN, PowerPAD) - same |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Bandwidth (G = 2) | 100 MHz | 100 MHz | 100 MHz | 100 MHz |
| Input Voltage Noise | 1.6 nV/Hz | 1.6 nV/Hz | 1.6 nV/Hz | 1.6 nV/Hz |
| Slew Rate | 100 V/us | 100 V/us | 100 V/us | 100 V/us |
| Output Current | 90 mA | 90 mA | 90 mA | 90 mA |
| Operating Temperature | 0C to +70C | -40C to +85C | 0C to +70C | 0C to +70C |
| Supply Voltage Range | Β±4.5 V to Β±16 V | Β±4.5 V to Β±16 V | Β±4.5 V to Β±16 V | Β±4.5 V to Β±16 V |
| Packaging | Tape & Reel (R suffix) | Tape & Reel | Reel/G4 lead-finish code | Standard (non-reel) option |
Key Differentiators
- Ultra-low 1.6 nV/Hz voltage noise in a 100 MHz-class voltage-feedback amp (vs Generic 100 MHz op amps)
- High 90 mA output drive (vs THS4032 (dual version))
- Temperature-grade flexibility within the same footprint (vs THS4031IDGNR)
Design Notes
Keep feedback and gain-set resistors between roughly 200 and 1000 ohms. At 1.6 nV/Hz amplifier noise, a 1 kOhm resistor contributes about 4 nV/Hz and would dominate total noise, defeating the purpose of choosing the THS4031. Low resistors also reduce the effect of input and PCB parasitic capacitance on the 100 MHz loop bandwidth, improving stability at low gains. Estimated: total input-referred noise of a 500 ohm feedback network adds roughly 2.9 nV/Hz, raising the 1.6 nV/Hz floor to about 3.3 nV/Hz.
The DGN package is a PowerPAD (thermally enhanced HVSSOP) part: the pad on the bottom is connected to ground and must be soldered onto a copper pour with an array of thermal vias. Estimated: at 90 mA output into a load with 10 V of headroom, internal dissipation reaches about 0.9 W, which without proper PowerPAD attachment would push junction temperature far beyond limits; a solid pour keeps theta_JA low enough for reliable sustained drive. Do not use the non-PowerPAD hand-solder layout on this package.
Place 0.1 uF ceramic decoupling capacitors within 2 mm of the V+ (pin 7) and V- (pin 4) pins, each returned directly to a local ground, plus a 2.2 uF to 10 uF bulk capacitor per supply rail. Keep the input traces (pins 2 and 3) short and guard them with ground to limit parasitic pickup at 100 MHz. Route the output away from the inputs to prevent feedback at high frequency; a small ground island between input and output traces is cheap insurance in dense multi-channel layouts.
The device is stable in gains of -1 V/V or greater, not unity-gain stable in all configurations, so check phase margin for any follower-like circuit with capacitive load. It is not rail-to-rail: maintain input and output headroom per the datasheet output swing curves at your supply and load. Also, do not substitute the SOIC-8 (D suffix) footprint for the DGN MSOP-8 in existing layouts - the packages differ in body size and pad geometry despite both being 8-pin amplifier pinouts.
Compliance Information
Compliance status not stated in the provided web data; consult the TI product page (https://www.ti.com/product/THS4031) for current RoHS/REACH status.
