MSC8251SVT1000B vs MSC8157TAG1000A Comparação
Comparação detalhada lado a lado de MSC8251SVT1000B por NXP Semiconductors e MSC8157TAG1000A por NXP Semiconductors. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.
NXP Semiconductors
MSC8157TAG1000A - 6-Core SC3850 DSP, 1GHz, MAPLE-B2 | NXP
MSC8157TAG1000A ⚠ Última compraComparação de especificações
| Parâmetro | MSC8251SVT1000B | MSC8157TAG1000A |
|---|---|---|
| Marca | NXP Semiconductors | NXP Semiconductors |
| Categoria | DSP | DSP |
| Status do ciclo de vida | Obsolete | Última compra |
| Status do estoque | In Stock | In Stock |
| Preço unitário (USD) | $65,00 | $178,00 |
| Manufacturer | NXP Semiconductors (formerly Freescale Semiconductor) | — |
| Core Architecture | SC3850 StarCore, single core | — |
| Core Revision | StarCore R2.1 | — |
| Maximum Core Clock | 1 GHz | — |
| MIPS | [DATA_NEEDED: MIPS rating for 1 GHz SC3850] | — |
| L1 Instruction Cache | 32 KB | 32 KB per core |
| L1 Data Cache | 32 KB | 32 KB per core |
| L2 Unified Cache | 512 KB (configurable, SRAM or MAP) | — |
| On-Chip RAM | 576 KB | — |
| Internal ROM | 96 KB | — |
| TDM Interfaces | 4 modules, up to 62.5 Mbps each, with H.110/H-MVIP support | — |
| Ethernet MAC | Yes (integrated) | — |
| PCI Express | Yes (integrated controller) | — |
| Serial RapidIO | Yes (SERDES-based) | — |
| DMA Controller | Multi-channel DMA | — |
| Package Type | FCBGA (Flip-Chip Ball Grid Array) | — |
| Package Pin Count | 783 balls | — |
| Package Dimensions | 29 mm x 29 mm | — |
| Tipo de montagem | Surface Mount | — |
| Lead-Free / Halogen-Free | Yes (lead-free, halogen-free package) | — |
| Status RoHS | Compliant | [DATA_NEEDED] |
| Temperatura de operação | [DATA_NEEDED: operating temperature grade] | -40C to +105C |
| Device Type | — | Six-core Digital Signal Processor (DSP) |
| DSP Architecture | — | StarCore SC3850 (6x cores) |
| Core Frequency | — | 1 GHz per core |
| Unified L2 Cache | — | 512 KB (configurable as M2 in 64 KB increments) |
| Accelerator | — | MAPLE-B2 baseband accelerator |
| Memory Controller | — | Dual-channel DDR2/DDR3 with ECC |
| High-Speed Serial I/O | — | 2x SRIO, 2x PCIe, 2x GbE, 2x CIPRI |
| Encapsulamento | — | 783-FCPBGA (29x29 mm) |
| Ball Pitch | — | 1.0 mm |
| Tensão de alimentação | — | [DATA_NEEDED: core/IO voltage] |
| MMU | — | Yes |
| Interrupt Controller | — | EPIC (Extended Programmable Interrupt Controller) |
| Timers | — | 2x 32-bit general-purpose per core |
| Nível MSL | — | [DATA_NEEDED] |