MSC8251SVT1000B vs MSC8157TAG1000A Comparaison
Comparaison détaillée côte à côte de MSC8251SVT1000B par NXP Semiconductors et MSC8157TAG1000A par NXP Semiconductors. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
NXP Semiconductors
MSC8157TAG1000A - 6-Core SC3850 DSP, 1GHz, MAPLE-B2 | NXP
MSC8157TAG1000A ⚠ Dernier achatComparaison des spécifications
| Paramètre | MSC8251SVT1000B | MSC8157TAG1000A |
|---|---|---|
| Marque | NXP Semiconductors | NXP Semiconductors |
| Catégorie | DSP | DSP |
| Statut du cycle de vie | Obsolete | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $65,00 | $178,00 |
| Manufacturer | NXP Semiconductors (formerly Freescale Semiconductor) | — |
| Core Architecture | SC3850 StarCore, single core | — |
| Core Revision | StarCore R2.1 | — |
| Maximum Core Clock | 1 GHz | — |
| MIPS | [DATA_NEEDED: MIPS rating for 1 GHz SC3850] | — |
| L1 Instruction Cache | 32 KB | 32 KB per core |
| L1 Data Cache | 32 KB | 32 KB per core |
| L2 Unified Cache | 512 KB (configurable, SRAM or MAP) | — |
| On-Chip RAM | 576 KB | — |
| Internal ROM | 96 KB | — |
| TDM Interfaces | 4 modules, up to 62.5 Mbps each, with H.110/H-MVIP support | — |
| Ethernet MAC | Yes (integrated) | — |
| PCI Express | Yes (integrated controller) | — |
| Serial RapidIO | Yes (SERDES-based) | — |
| DMA Controller | Multi-channel DMA | — |
| Package Type | FCBGA (Flip-Chip Ball Grid Array) | — |
| Package Pin Count | 783 balls | — |
| Package Dimensions | 29 mm x 29 mm | — |
| Type de montage | Surface Mount | — |
| Lead-Free / Halogen-Free | Yes (lead-free, halogen-free package) | — |
| Statut RoHS | Compliant | [DATA_NEEDED] |
| Température de fonctionnement | [DATA_NEEDED: operating temperature grade] | -40C to +105C |
| Device Type | — | Six-core Digital Signal Processor (DSP) |
| DSP Architecture | — | StarCore SC3850 (6x cores) |
| Core Frequency | — | 1 GHz per core |
| Unified L2 Cache | — | 512 KB (configurable as M2 in 64 KB increments) |
| Accelerator | — | MAPLE-B2 baseband accelerator |
| Memory Controller | — | Dual-channel DDR2/DDR3 with ECC |
| High-Speed Serial I/O | — | 2x SRIO, 2x PCIe, 2x GbE, 2x CIPRI |
| Boîtier | — | 783-FCPBGA (29x29 mm) |
| Ball Pitch | — | 1.0 mm |
| Tension d'alimentation | — | [DATA_NEEDED: core/IO voltage] |
| MMU | — | Yes |
| Interrupt Controller | — | EPIC (Extended Programmable Interrupt Controller) |
| Timers | — | 2x 32-bit general-purpose per core |
| Niveau MSL | — | [DATA_NEEDED] |