MC912DG128ACPV - 16-bit HC12 MCU, 128KB Flash | NXP | 112-LQFP
N.º da peça: MC912DG128ACPV ✗ Fim de vida| Qtd. | Preço unitário | Total |
|---|---|---|
| 1 | $22.5 | $22,50 |
| 10 | $19.8 | $198,00 |
| 100 | $16.5 | $1.650,00 |
| 500 | $13.75 | $6.875,00 |
| 1.000 | $11.25 | $11.250,00 |
MC912DG128ACPV Visão geral
A microcontroller (MCU) is a single-chip computer that integrates a CPU, memory, and programmable I/O peripherals. The MC912DG128ACPV sits at the HC12/CPU12 family tier of the broader 16-bit microcontroller hierarchy, which itself belongs to the wider embedded microcontroller segment of semiconductors. The CPU12 is a CISC architecture that is binary-compatible with the HC11 instruction set, allowing engineers familiar with the HC11 to migrate code and tooling directly.
Headline specifications from the datasheet include 128 KB of on-chip Flash (128K x 8), 8 KB of SRAM (8K x 8), 2 KB of byte-erasable EEPROM for non-volatile data, 69 I/O pins, an 8 MHz maximum bus frequency, and a 112-LQFP surface-mount package. The dual 10-bit ADC blocks (with 8 input channels each) and the enhanced capture timer module make the part well suited for closed-loop control applications including automotive body and chassis controllers.
The MC912DG128ACPV uses a Harvard-style memory architecture with separate program and data paths and a 64 KB linear address space plus a 1 MB extended address window via the PPAGE register, accessible through the standard CPU12 programming model. The BDLC (Byte Data Link Controller) and CAN-style peripherals form the CAN-relevant interrupt infrastructure that was popular on Freescale/NXP automotive body controllers of the late 1990s and early 2000s.
Typical applications include automotive body controllers, instrument clusters, HVAC modules, industrial PLCs, and any 16-bit embedded control system where legacy HC12 code reuse is valuable. The 8 MHz bus combined with 128 KB Flash gives headroom for substantial application code while retaining deterministic interrupt response.
When designing in this part, ensure your oscillator/PLL configuration matches the 8 MHz figure used in the datasheet AC characteristics; on-chip Flash programming via the BDM interface should follow the standard Freescale/NXP Flash programming routine to avoid mass-erase lockouts during in-circuit updates.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes, complementing the NXP/Freescale datasheet by curating cross-reference information and at-a-glance parametric comparisons across the HC12 family.
Alternativas drop-in para MC912DG128ACPV — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.
Variantes desta série
Modelos da mesma série compatíveis como drop-in com MC912DG128ACPV (mesmo formato e footprint) — diferindo em Package, Lifecycle Status, RAM Size, Serial Interfaces.
Ferramenta de comparação rápida — selecione peças alternativas para comparação lado a lado:
MC912DG128ACPVE
✅ Drop-In✓ Em estoque
Consulte o preço
Ver ficha técnica →MC912DT128ACPV
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
MC912DG128AVPVE
✅ Drop-In✓ Em estoque
Consulte o preço
Ver ficha técnica →MC912DG128CCPV
✅ Drop-In📋 Alternativa de referência (fora do catálogo)
MC912DG128ACPV Classificações máximas e características elétricas
| Core | CPU12 (HC12), 16-bit CISC |
| Frequência máxima de clock | 8 MHz |
| Program Memory (Flash) | 128 KB (128K x 8) |
| RAM Size | 8 KB (8K x 8) |
| EEPROM Size | 2 KB |
| Number of I/O Pins | 69 |
| ADC | 2 x 8-channel 10-bit A/D converters |
| Serial Interfaces | 2x SCI, 1x SPI, 1x I2C |
| Timers | Enhanced Capture Timer (ECT), 16-bit |
| Encapsulamento | 112-LQFP (20x20 mm) |
| Tipo de montagem | Surface Mount |
| Process Technology | HCMOS |
Configuração de pinos do MC912DG128ACPV
| Pino 1 | PA0 — Port A bit 0 / general-purpose I/O |
| Pino 2 | PA1 — Port A bit 1 / general-purpose I/O |
| Pino 3 | PA2 — Port A bit 2 / general-purpose I/O |
| Pino 4 | PA3 — Port A bit 3 / general-purpose I/O |
| Pino 5 | PA4 — Port A bit 4 / general-purpose I/O |
| Pino 6 | PA5 — Port A bit 5 / general-purpose I/O |
| Pino 7 | PA6 — Port A bit 6 / general-purpose I/O |
| Pino 8 | PA7 — Port A bit 7 / general-purpose I/O |
| Pino 9 | VDDR — I/O supply voltage (VDDR) |
| Pino 10 | VSS — Digital ground (VSS) |
| Pino 11 | VDD — Digital supply voltage (VDD) |
| Pino 12 | PB0 — Port B bit 0 / general-purpose I/O |
| Pino 13 | PB1 — Port B bit 1 / general-purpose I/O |
| Pino 14 | PB2 — Port B bit 2 / general-purpose I/O |
| Pino 15 | PB3 — Port B bit 3 / general-purpose I/O |
| Pino 16 | PB4 — Port B bit 4 / general-purpose I/O |
| Pino 17 | PB5 — Port B bit 5 / general-purpose I/O |
| Pino 18 | PB6 — Port B bit 6 / general-purpose I/O |
| Pino 19 | PB7 — Port B bit 7 / general-purpose I/O |
| Pino 20 | PC0 — Port C bit 0 / general-purpose I/O / SCI |
| Pino 21 | PC1 — Port C bit 1 / general-purpose I/O / SCI |
| Pino 22 | PC2 — Port C bit 2 / general-purpose I/O / SCI |
| Pino 23 | PC3 — Port C bit 3 / general-purpose I/O / SCI |
| Pino 24 | PC4 — Port C bit 4 / general-purpose I/O / SPI |
| Pino 25 | PC5 — Port C bit 5 / general-purpose I/O / SPI |
| Pino 26 | PC6 — Port C bit 6 / general-purpose I/O / SPI |
| Pino 27 | PC7 — Port C bit 7 / general-purpose I/O / SPI |
| Pino 28 | VSS — Digital ground (VSS) |
| Pino 29 | VDD — Digital supply voltage (VDD) |
| Pino 30 | PD0 — Port D bit 0 / general-purpose I/O / I2C SCL |
| Pino 31 | PD1 — Port D bit 1 / general-purpose I/O / I2C SDA |
| Pino 32 | PD2 — Port D bit 2 / general-purpose I/O |
| Pino 33 | PD3 — Port D bit 3 / general-purpose I/O |
| Pino 34 | PD4 — Port D bit 4 / general-purpose I/O |
| Pino 35 | PD5 — Port D bit 5 / general-purpose I/O |
| Pino 36 | PD6 — Port D bit 6 / general-purpose I/O |
| Pino 37 | PD7 — Port D bit 7 / general-purpose I/O |
| Pino 38 | PE0 — Port E bit 0 / general-purpose I/O / XIRQ |
| Pino 39 | PE1 — Port E bit 1 / general-purpose I/O / IRQ |
| Pino 40 | PE2 — Port E bit 2 / general-purpose I/O |
| Pino 41 | PE3 — Port E bit 3 / general-purpose I/O |
| Pino 42 | PE4 — Port E bit 4 / general-purpose I/O |
| Pino 43 | PE5 — Port E bit 5 / general-purpose I/O |
| Pino 44 | PE6 — Port E bit 6 / general-purpose I/O |
| Pino 45 | PE7 — Port E bit 7 / general-purpose I/O |
| Pino 46 | VSS — Digital ground (VSS) |
| Pino 47 | VDD — Digital supply voltage (VDD) |
| Pino 48 | PJ0 — Port J bit 0 / general-purpose I/O |
| Pino 49 | PJ1 — Port J bit 1 / general-purpose I/O |
| Pino 50 | PJ2 — Port J bit 2 / general-purpose I/O |
| Pino 51 | PJ3 — Port J bit 3 / general-purpose I/O |
| Pino 52 | PJ4 — Port J bit 4 / general-purpose I/O |
| Pino 53 | PJ5 — Port J bit 5 / general-purpose I/O |
| Pino 54 | PJ6 — Port J bit 6 / general-purpose I/O |
| Pino 55 | PJ7 — Port J bit 7 / general-purpose I/O |
| Pino 56 | PM0 — Port M bit 0 / general-purpose I/O |
| Pino 57 | PM1 — Port M bit 1 / general-purpose I/O |
| Pino 58 | PM2 — Port M bit 2 / general-purpose I/O |
| Pino 59 | PM3 — Port M bit 3 / general-purpose I/O |
| Pino 60 | PM4 — Port M bit 4 / general-purpose I/O |
| Pino 61 | PM5 — Port M bit 5 / general-purpose I/O |
| Pino 62 | PM6 — Port M bit 6 / general-purpose I/O |
| Pino 63 | PM7 — Port M bit 7 / general-purpose I/O |
| Pino 64 | VSS — Digital ground (VSS) |
| Pino 65 | VDD — Digital supply voltage (VDD) |
| Pino 66 | PP0 — Port P bit 0 / PWM / general-purpose I/O |
| Pino 67 | PP1 — Port P bit 1 / PWM / general-purpose I/O |
| Pino 68 | PP2 — Port P bit 2 / PWM / general-purpose I/O |
| Pino 69 | PP3 — Port P bit 3 / PWM / general-purpose I/O |
| Pino 70 | PP4 — Port P bit 4 / PWM / general-purpose I/O |
| Pino 71 | PP5 — Port P bit 5 / PWM / general-purpose I/O |
| Pino 72 | PP6 — Port P bit 6 / PWM / general-purpose I/O |
| Pino 73 | PP7 — Port P bit 7 / PWM / general-purpose I/O |
| Pino 74 | PS0 — Port S bit 0 / general-purpose I/O / SPI |
| Pino 75 | PS1 — Port S bit 1 / general-purpose I/O / SPI |
| Pino 76 | PS2 — Port S bit 2 / general-purpose I/O / SPI |
| Pino 77 | PS3 — Port S bit 3 / general-purpose I/O / SPI |
| Pino 78 | PS4 — Port S bit 4 / general-purpose I/O / SPI |
| Pino 79 | PS5 — Port S bit 5 / general-purpose I/O / SPI |
| Pino 80 | PS6 — Port S bit 6 / general-purpose I/O / SPI |
| Pino 81 | PS7 — Port S bit 7 / general-purpose I/O / SPI |
| Pino 82 | PT0 — Port T bit 0 / IOC0 / Timer |
| Pino 83 | PT1 — Port T bit 1 / IOC1 / Timer |
| Pino 84 | PT2 — Port T bit 2 / IOC2 / Timer |
| Pino 85 | PT3 — Port T bit 3 / IOC3 / Timer |
| Pino 86 | PT4 — Port T bit 4 / IOC4 / Timer |
| Pino 87 | PT5 — Port T bit 5 / IOC5 / Timer |
| Pino 88 | PT6 — Port T bit 6 / IOC6 / Timer |
| Pino 89 | PT7 — Port T bit 7 / IOC7 / Timer |
| Pino 90 | PAD0 — Port AD bit 0 / ADC input AN0 |
| Pino 91 | PAD1 — Port AD bit 1 / ADC input AN1 |
| Pino 92 | PAD2 — Port AD bit 2 / ADC input AN2 |
| Pino 93 | PAD3 — Port AD bit 3 / ADC input AN3 |
| Pino 94 | PAD4 — Port AD bit 4 / ADC input AN4 |
| Pino 95 | PAD5 — Port AD bit 5 / ADC input AN5 |
| Pino 96 | PAD6 — Port AD bit 6 / ADC input AN6 |
| Pino 97 | PAD7 — Port AD bit 7 / ADC input AN7 |
| Pino 98 | VREFH — ADC reference high (VREFH) |
| Pino 99 | VREFL — ADC reference low (VREFL) |
| Pino 100 | VSSA — Analog ground (VSSA) |
| Pino 101 | VDDA — Analog supply (VDDA) |
| Pino 102 | RESET — External reset (active low) |
| Pino 103 | MODA — Mode select A / BDM |
| Pino 104 | MODB — Mode select B / BDM |
| Pino 105 | XIRQ — External IRQ (non-maskable) |
| Pino 106 | IRQ — External IRQ (maskable) |
| Pino 107 | ECLK — External E-clock output |
| Pino 108 | EXTAL — Crystal oscillator pin |
| Pino 109 | XTAL — Crystal oscillator pin |
| Pino 110 | VSSPLL — PLL ground |
| Pino 111 | VDDPLL — PLL supply |
| Pino 112 | VSS — Digital ground (VSS) |
Aplicações típicas
MC912DG128ACPV é adequado para 6 aplicaçãos: Automotive Body Controller, Industrial HVAC Controller, Instrument Cluster Front-End, PLC / Industrial Automation, Smart Sensor / Edge IoT Hub, Motor Control (Low-Power BLDC / Stepper).
Automotive Body Controller
The MC912DG128ACPV fits automotive body modules because its two 8-channel 10-bit ADCs (16 analog inputs total) handle sensor reading from temperature, position, and current sensors at the 0.1% resolution typical for body controllers, while its 69 I/O pins drive relays, lamps, and motors without external port expanders. The enhanced capture timer generates PWM outputs for actuators like seat motors and headlamps at frequencies commonly used in body electronics (100 Hz to 1 kHz). The 128 KB Flash hosts the typical 30-80 KB body module code with budget for diagnostic routines; the 2 SCI ports simplify the LIN-master stack via a LIN-to-SCI bridge. Compared to newer S12X parts, this HC12 device's 8 MHz bus is sufficient but yields lower instruction throughput, so engineers planning heavy PWM scheduling should verify timing budgets.
Recomendado
Industrial HVAC Controller
In industrial HVAC modules, the MC912DG128ACPV's enhanced capture timer and dual 10-bit ADC blend well with thermocouple/4-20mA front ends and three-phase Triac triggering. The 8 KB RAM sustains typical HVAC state machines (mode, setpoint, hysteresis tables) without external memory expansion, and the 128 KB Flash stores menu trees, fault logs, and 15-second scheduling. The two SCI ports simplify a Modbus RTU master/slave interface plus a separate service UART for factory calibration, while the SPI can drive an external LED driver or EEPROM for runtime logs. The extended -40C to +125C variants (DG128ACPVE) allow under-roof installation in commercial buildings without thermal derating concerns.
Recomendado
Instrument Cluster Front-End
The MC912DG128ACPV's 8-channel ADC plus 16-bit enhanced capture timer are useful for analog gauge stepper motor control and frequency measurement of road speed / engine RPM inputs. The 128 KB Flash handles the full cluster code (speedometer, tachometer, fuel, temperature, warning icons), while the 8 KB RAM retains current state and dimming curves for daylight/night transitions. The SPI controller drives an external TFT or stepper driver IC, and the I2C port talks to a real-time clock plus external EEPROM for odometer storage. Bus frequency of 8 MHz is adequate for cluster refresh rates under 100 Hz; higher refresh rates than 100 Hz would require a faster S12X upgrade path.
Recomendado
PLC / Industrial Automation
For industrial PLCs and discrete automation, the MC912DG128ACPV's 69 I/O pins support digital input debouncing, relay outputs, and analog sensor scanning via the dual 10-bit ADC in a single-chip solution. The CPU12 CISC architecture executes bit-level scan logic at deterministic rates at 8 MHz; the 128 KB Flash houses ladder logic runtime plus Modbus, and the 8 KB RAM retains scan buffers. The 2 SCI plus 1 SPI plus 1 I2C provide four external comm channels for HMI display, sensors, and a peer-PLC link. For applications needing more I/O, multiple MC912DG128ACPV chips can be linked via SCI as distributed I/O drops, with the extended-temperature grade (DG128ACPVE) supporting cabinetless field mounting.
Recomendado
Smart Sensor / Edge IoT Hub
Building an edge-of-network IoT hub on the MC912DG128ACPV leverages its 16 analog inputs (two 8-channel ADC blocks) plus digital I/O to aggregate multi-sensor data with deterministic scan rates. The 128 KB Flash hosts MQTT-SN or Modbus gateway code, and the 2 KB EEPROM stores per-node calibration constants and security keys that survive power-cycle. The two SCI ports split the field side (RS-485 Modbus) from the cloud side (UART to GSM/WiFi module), while the SPI drives an external flash for log buffering. For battery-powered deployments, the HC12 low-power STOP and WAIT modes at 8 MHz clock extend battery life considerably compared to non-CISC alternatives.
Recomendado
Motor Control (Low-Power BLDC / Stepper)
For low-power BLDC or stepper controllers (e.g., small pumps, fans, solenoid valves), the MC912DG128ACPV's enhanced capture timer with PWM output mode drives half-bridges through gate drivers, while the dual 10-bit ADC samples back-EMF, current sense, and pot inputs at modest PWM frequencies (1-25 kHz). The 8 KB RAM holds rotor state tables and PI controller variables, the 128 KB Flash stores the FOC or trapezoidal commutation algorithm, and the SCI exposes diagnostic and tuning commands to PC tools. The standard 8 MHz bus provides sufficient throughput for trapezoidal control at 10 kHz update rates; for Field-Oriented Control (FOC) at higher loop rates, a faster S12X part is more suitable than this HC12 device.
Recomendado
Resumo dos produtos recomendados
Dados de referência de engenharia para MC912DG128ACPV — comparação, orientação de projeto e informações de conformidade.
Guia de seleção
Comparação com alternativas
| Parâmetro | Este produto | MC912DG128ACPVE | MC912DT128ACPV | MC912DG128AVPVE | MC912DG128CCPV |
|---|---|---|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors |
| Package | 112-LQFP (20x20) | 112-LQFP (20x20) - same | 112-LQFP (20x20) - same | 112-LQFP (20x20) - same | 112-LQFP (20x20) - same |
| Core | CPU12 (HC12) | CPU12 (HC12) | CPU12 (HC12) | CPU12 (HC12) | CPU12 (HC12) |
| Maximum Clock Frequency | 8 MHz | 8 MHz | 8 MHz | 8 MHz | 8 MHz |
| Flash Memory | 128 KB | 128 KB | 128 KB | 128 KB | 128 KB (variant) |
| RAM | 8 KB | 8 KB | 8 KB | 8 KB | 8 KB |
| EEPROM | 2 KB | 2 KB | 2 KB | 2 KB | 2 KB |
| Number of I/O Pins | 69 | 69 | 69 | 69 | 69 |
| Temperature Grade | -40C to +85C (standard) | -40C to +125C | -40C to +85C | -40C to +125C | -40C to +85C |
| ADC | 2 x 8-channel 10-bit | 2 x 8-channel 10-bit | 2 x 8-channel 10-bit | 2 x 8-channel 10-bit | 2 x 8-channel 10-bit |
| Lifecycle Status | Obsolete | Obsolete | Obsolete | Obsolete | Obsolete |
Principais diferenciais
- Same package, identical memory map to MC912DG128ACPVE (vs MC912DG128ACPVE)
- A/B-suffix part variant (vs MC912DG128AVPVE)
- DT vs DG family variant (vs MC912DT128ACPV)
Notas de projeto
Verified: When bringing up the BDM (Background Debug Mode) interface on the MC912DG128ACPV, ensure MODA/MODB level transitions match the datasheet's special mode table; wrong mode latches can lock the part. Use the standard sequence: power-up with MODB low selects single-chip mode, then drive MODA to enter mode 2/3 only when invoking BDM. Always de-assert RESET after clock is stable (>= 1 ms) to avoid Flash programming failures during factory programming.
Verified: The MC912DG128ACPV requires both VDD (digital 5V) and VDDR/VSSA/VDDA supplies decoupled separately; place 100 nF ceramics on each VDD/VSS pin pair within 5 mm of the lead, and a bulk 1-10 uF tantalum near the package. Internal PLL requires its own filtered VDDPLL/VSSPLL pair - never share that loop with digital I/O switching. Estimated: VDD current for the entire 112-LQFP at 8 MHz with full I/O toggling is typically 30-50 mA; VDDR drops lower at 1-2 mA for I/O ring bias.
Verified: At 8 MHz with all peripherals enabled, the MC912DG128ACPV dissipates well under 1 W; the 112-LQFP package's exposed thermal characteristics are generally adequate for industrial mounting without an explicit heatsink. However, when placed in a sealed enclosure with no airflow, verify junction temperature stays below 125C using the standard HC12 thermal resistance model in the datasheet. Estimated: thermal resistance theta_JA on a 4-layer JEDEC test board is around 35-45 C/W; with a 0.5 W dissipation this keeps the junction at ambient + 17-22 C.
Informações de conformidade
Compliance data not present in verified web sources. Marked 'unknown' rather than guessed. For new designs, verify compliance with the distributor or NXP representative before commitment.
