Intel

EPM7256SQC208-10 - MAX 7000S CPLD, 256 Macrocells, 10ns, 208-PQFP | Intel

Артикул: EPM7256SQC208-10 ✗ Снят с производства
В наличии Отправка в течение 1–3 рабочих дней
208-pin PQFP (SQC208) Package Up to 175.4 MHz Speed
От $11.2 USD / шт.
MOQ: 1 |
Цена обновлена: 2026-09-12
Оптовые цены
Кол-во Цена за ед. Итого
1 $28.5 $28,50
10 $24.8 $248,00
100 $18.95 $1.895,00
500 $14.5 $7.250,00
1.000 $11.2 $11.200,00
ℹ️ Все цены указаны в USD

EPM7256SQC208-10 Обзор

The Intel (formerly Altera) EPM7256SQC208-10 is a high-density, high-performance EEPROM-based Complex Programmable Logic Device (CPLD) from the MAX 7000S family, featuring 256 macrocells, 164 user I/O pins, a 10 ns pin-to-pin propagation delay, and a 208-pin PQFP package.

A CPLD (Complex Programmable Logic Device) is a non-volatile programmable logic device that combines multiple PAL/GAL-like macrocell blocks with a central interconnect matrix. CPLDs sit in the programmable logic hierarchy between simple SPLDs (single PLDs such as PAL/GAL) and large FPGAs (Field-Programmable Gate Arrays), providing deterministic timing, instant-on operation, and high-logic-density glue logic in a single chip. The MAX 7000S family uses a second-generation MAX architecture with EEPROM process technology, giving engineers in-system programmability (ISP) and 100% tested stuck-fault coverage.

The EPM7256SQC208-10 is built around 16 Logic Array Blocks (LABs), each containing 16 macrocells, and delivers up to 5,000 usable gates. Key features include a 10 ns pin-to-pin delay (tPD), counter speeds up to 175.4 MHz, 3.3V or 5V tolerant I/O (with 5V core on the standard -10 variant), in-system programmability via IEEE 1149.1 JTAG, and PCI-SIG compliant I/O for bus interface designs. The 164 I/O pins and JTAG support make it well-suited for bus bridging, address decoding, and state-machine control.

The device implements a programmable interconnect matrix (PIA) that routes all LAB outputs to any LAB input, ensuring predictable timing and removing the routing congestion seen in older SPLD architectures. The MAX 7000S architecture also supports programmable power-saving modes per macrocell, which reduces quiescent current when blocks are idle.

Typical applications include telecommunications glue logic, industrial control interface bridging, address decoding and bus arbitration in embedded systems, PCI bus interface glue, and replacement of multiple discrete SSI/MSI logic packages. The combination of non-volatile storage, instant-on, and deterministic timing makes it attractive for safety-critical boot logic.

A key design tip: the -10 speed grade refers to the slowest of the MAX 7000S speed grades (-6, -7, -10). When designing, ensure that the timing budget (clock period minus tCO, tSU) accommodates the 10 ns propagation delay and that PCI-compliant I/O is only used when the design meets the PCI Local Bus Specification 2.2 timing requirements.

This page synthesizes distributor pricing, in-system programmable drop-in alternatives, and practical design notes that go beyond the manufacturer datasheet.

Аналоги без доработки для EPM7256SQC208-10 — тот же корпус, pin-to-pin совместимость. Компоненты в других корпусах, требующие переработки PCB, исключены.

Варианты в этой серии

Модели той же серии, совместимые без доработки с EPM7256SQC208-10 (тот же форм-фактор и посадочное место) — отличается по Package, RoHS Status, Operating Temperature, Speed Grade, Family.

Altera
Package: 208-pin PQFP (Plastic Quad Flat Pack)
RoHS Status: unknown
Operating Temperature: 0 C to +70 C (Commercial)
Сравнить с EPM7256SQC208-10 →
Altera
Package: 208-pin PQFP (FQFP)
RoHS Status: Compliant (N suffix)
Speed Grade: -7
Сравнить с EPM7256SQC208-10 →
Intel
Package: PQFP-208
RoHS Status: Compliant (lead-free per distributor data)
Operating Temperature: -40C to +85C (industrial)
Сравнить с EPM7256SQC208-10 →
Intel
Package: 208-pin PQFP
RoHS Status: Compliant per distributor listings
Operating Temperature: 0C to +90C (commercial)
Сравнить с EPM7256SQC208-10 →
Altera
Package: 208-pin PQFP (28x28 mm)
RoHS Status: Contains lead / RoHS non-compliant (per third-party listing)
Family: MAX 7000S
Сравнить с EPM7256SQC208-10 →
Altera
Package: 208-pin PQFP
RoHS Status: Lead free / RoHS Compliant
Speed Grade: -15
Сравнить с EPM7256SQC208-10 →
Altera
Package: 208-pin PQFP (28 x 28 mm, 0.5 mm pitch)
Speed Grade: -7 (7.5 ns)
Сравнить с EPM7256SQC208-10 →
Altera
Package: 208-pin PQFP (Plastic Quad Flat Pack)
RoHS Status: Compliant (N suffix = lead-free)
Operating Temperature: Commercial (0C to +70C)
Сравнить с EPM7256SQC208-10 →
Altera
Package: 208-pin PQFP (QFP208)
Сравнить с EPM7256SQC208-10 →
Intel
Package: 208-pin RQFP (BFQFP) exposed pad, 28x28 mm
Operating Temperature: 0C to +70C (TA, commercial)
Family: MAX 7000S
Сравнить с EPM7256SQC208-10 →
Intel
Package: 208-pin RQFP (PowerQuad Flat Pack)
RoHS Status: Compliant (N suffix = lead-free)
Family: MAX 7000S
Сравнить с EPM7256SQC208-10 →
Altera
Package: 208-pin RQFP (PowerQuad Flat Pack)
RoHS Status: Compliant (N suffix)
Сравнить с EPM7256SQC208-10 →

Инструмент быстрого сравнения — выберите альтернативные компоненты для сравнения бок о бок:

EPM7256AEQC208-10N

✅ Прямая замена
📦 208-pin PQFP (SQC208)
AEC revision, lead-free, same 256 macrocells/10ns/PQFP208 footprint

📋 Справочный аналог (нет в каталоге)

EPM7256AQI208-10

✅ Прямая замена
Intel
📦 208-pin PQFP (SQC208)
MAX 7000A · 256 · 16 · 5,000 · 68 · 10 ns · 93.5 MHz · 227.3 MHz

✓ В наличии

$13.22 / шт.

Открыть даташит →

EPM7256AEQI208-7N

✅ Прямая замена
Altera
📦 208-pin PQFP (SQC208)
MAX 7000A · 256 · 5,000 · 164 · 16 · 7.5 ns · 126.6 MHz · 3.3 V

✓ В наличии

Уточнить цену

Открыть даташит →

EPM7256AEQC208-5N

✅ Прямая замена
Altera
📦 208-pin PQFP (SQC208)
MAX 7000A · CMOS, EEPROM-based · 5,000 · 256 · 164 · 16 · 208 · 208-pin PQFP (Plastic Quad Flat Pack)

✓ В наличии

$11.5 / шт.

Открыть даташит →

EPM7256BQC208-7

✅ Прямая замена
Intel
📦 208-pin PQFP (SQC208)
MAX 7000B · CPLD - Complex Programmable Logic Device · 5,000 · 256 · 164 · 16 Logic Array Blocks · 126.6 MHz · 7.5 ns (-7 speed grade)

✓ В наличии

$9.75 / шт.

Открыть даташит →

EPM7256SQC208-10 Максимальные параметры и электрические характеристики

Series MAX 7000S
Device Type CPLD (Complex Programmable Logic Device)
Macrocells 256
Logic Array Blocks (LABs) 16
Usable Gates 5,000
Number of I/O Pins 164
Propagation Delay (tPD) 10 ns
Counter Speed (fCNT) Up to 175.4 MHz
Корпус 208-pin PQFP (SQC208)
Тип монтажа Surface Mount
Programmable Technology EEPROM (in-system programmable)
JTAG Support (IEEE 1149.1) Yes
PCI Compliance PCI Local Bus Specification 2.2 compliant
Рабочая температура 0C to +70C (commercial)
Уровень MSL 3 (168 hours)

Конфигурация выводов EPM7256SQC208-10

Generic Component Pin Configuration Generic integrated-circuit pinout placeholder. Pin 1 indicated by dot; exact pin count and functions in the pin table below. 1 N 2 N-1 3 N-2 4 N-3 Pin Configuration See pin table below for pin functions Package-specific diagram not available
Контакт 1 I/O — User I/O pin
Контакт 2 I/O — User I/O pin
Контакт 3 I/O — User I/O pin
Контакт 4 I/O — User I/O pin
Контакт 5 I/O — User I/O pin
Контакт 6 I/O — User I/O pin
Контакт 7 VCC — 5V supply voltage
Контакт 8 I/O — User I/O pin
Контакт 9 I/O — User I/O pin
Контакт 10 I/O — User I/O pin
Контакт 11 GND — Ground
Контакт 12 I/O — User I/O pin
Контакт 13 I/O — User I/O pin
Контакт 14 I/O — User I/O pin
Контакт 15 I/O — User I/O pin
Контакт 16 I/O — User I/O pin
Контакт 17 I/O — User I/O pin
Контакт 18 I/O — User I/O pin
Контакт 19 TDI — JTAG Test Data In
Контакт 20 TMS — JTAG Test Mode Select
Контакт 21 TCK — JTAG Test Clock
Контакт 22 TDO — JTAG Test Data Out
Контакт 23 I/O — User I/O pin
Контакт 24 I/O — User I/O pin
Контакт 25 I/O — User I/O pin
Контакт 26 I/O — User I/O pin
Контакт 27 I/O — User I/O pin
Контакт 28 I/O — User I/O pin
Контакт 29 VCC — 5V supply voltage
Контакт 30 I/O — User I/O pin
Контакт 31 I/O — User I/O pin
Контакт 32 I/O — User I/O pin
Контакт 33 I/O — User I/O pin
Контакт 34 I/O — User I/O pin
Контакт 35 GND — Ground
Контакт 36 I/O — User I/O pin
Контакт 37 I/O — User I/O pin
Контакт 38 I/O — User I/O pin
Контакт 39 I/O — User I/O pin
Контакт 40 I/O — User I/O pin
Контакт 41 I/O — User I/O pin
Контакт 42 I/O — User I/O pin
Контакт 43 I/O — User I/O pin
Контакт 44 I/O — User I/O pin
Контакт 45 I/O — User I/O pin
Контакт 46 I/O — User I/O pin
Контакт 47 VCC — 5V supply voltage
Контакт 48 I/O — User I/O pin
Контакт 49 I/O — User I/O pin
Контакт 50 I/O — User I/O pin
Контакт 51 I/O — User I/O pin
Контакт 52 I/O — User I/O pin
Контакт 53 GND — Ground
Контакт 54 I/O — User I/O pin
Контакт 55 I/O — User I/O pin
Контакт 56 I/O — User I/O pin
Контакт 57 I/O — User I/O pin
Контакт 58 I/O — User I/O pin
Контакт 59 I/O — User I/O pin
Контакт 60 I/O — User I/O pin
Контакт 61 I/O — User I/O pin
Контакт 62 I/O — User I/O pin
Контакт 63 I/O — User I/O pin
Контакт 64 I/O — User I/O pin
Контакт 65 I/O — User I/O pin
Контакт 66 I/O — User I/O pin
Контакт 67 I/O — User I/O pin
Контакт 68 I/O — User I/O pin
Контакт 69 I/O — User I/O pin
Контакт 70 I/O — User I/O pin
Контакт 71 VCC — 5V supply voltage
Контакт 72 I/O — User I/O pin
Контакт 73 I/O — User I/O pin
Контакт 74 I/O — User I/O pin
Контакт 75 GND — Ground
Контакт 76 I/O — User I/O pin
Контакт 77 I/O — User I/O pin
Контакт 78 I/O — User I/O pin
Контакт 79 I/O — User I/O pin
Контакт 80 I/O — User I/O pin
Контакт 81 I/O — User I/O pin
Контакт 82 I/O — User I/O pin
Контакт 83 I/O — User I/O pin
Контакт 84 I/O — User I/O pin
Контакт 85 I/O — User I/O pin
Контакт 86 I/O — User I/O pin
Контакт 87 I/O — User I/O pin
Контакт 88 I/O — User I/O pin
Контакт 89 I/O — User I/O pin
Контакт 90 I/O — User I/O pin
Контакт 91 I/O — User I/O pin
Контакт 92 I/O — User I/O pin
Контакт 93 VCC — 5V supply voltage
Контакт 94 I/O — User I/O pin
Контакт 95 I/O — User I/O pin
Контакт 96 I/O — User I/O pin
Контакт 97 GND — Ground
Контакт 98 I/O — User I/O pin
Контакт 99 I/O — User I/O pin
Контакт 100 I/O — User I/O pin
Контакт 101 I/O — User I/O pin
Контакт 102 I/O — User I/O pin
Контакт 103 I/O — User I/O pin
Контакт 104 I/O — User I/O pin
Контакт 105 I/O — User I/O pin
Контакт 106 I/O — User I/O pin
Контакт 107 I/O — User I/O pin
Контакт 108 I/O — User I/O pin
Контакт 109 I/O — User I/O pin
Контакт 110 I/O — User I/O pin
Контакт 111 I/O — User I/O pin
Контакт 112 I/O — User I/O pin
Контакт 113 I/O — User I/O pin
Контакт 114 I/O — User I/O pin
Контакт 115 VCC — 5V supply voltage
Контакт 116 I/O — User I/O pin
Контакт 117 I/O — User I/O pin
Контакт 118 I/O — User I/O pin
Контакт 119 GND — Ground
Контакт 120 I/O — User I/O pin
Контакт 121 I/O — User I/O pin
Контакт 122 I/O — User I/O pin
Контакт 123 I/O — User I/O pin
Контакт 124 I/O — User I/O pin
Контакт 125 I/O — User I/O pin
Контакт 126 I/O — User I/O pin
Контакт 127 I/O — User I/O pin
Контакт 128 I/O — User I/O pin
Контакт 129 I/O — User I/O pin
Контакт 130 I/O — User I/O pin
Контакт 131 I/O — User I/O pin
Контакт 132 I/O — User I/O pin
Контакт 133 I/O — User I/O pin
Контакт 134 I/O — User I/O pin
Контакт 135 I/O — User I/O pin
Контакт 136 I/O — User I/O pin
Контакт 137 VCC — 5V supply voltage
Контакт 138 I/O — User I/O pin
Контакт 139 I/O — User I/O pin
Контакт 140 I/O — User I/O pin
Контакт 141 GND — Ground
Контакт 142 I/O — User I/O pin
Контакт 143 I/O — User I/O pin
Контакт 144 I/O — User I/O pin
Контакт 145 I/O — User I/O pin
Контакт 146 I/O — User I/O pin
Контакт 147 I/O — User I/O pin
Контакт 148 I/O — User I/O pin
Контакт 149 I/O — User I/O pin
Контакт 150 I/O — User I/O pin
Контакт 151 I/O — User I/O pin
Контакт 152 I/O — User I/O pin
Контакт 153 I/O — User I/O pin
Контакт 154 I/O — User I/O pin
Контакт 155 I/O — User I/O pin
Контакт 156 I/O — User I/O pin
Контакт 157 I/O — User I/O pin
Контакт 158 I/O — User I/O pin
Контакт 159 VCC — 5V supply voltage
Контакт 160 I/O — User I/O pin
Контакт 161 I/O — User I/O pin
Контакт 162 I/O — User I/O pin
Контакт 163 GND — Ground
Контакт 164 I/O — User I/O pin
Контакт 165 I/O — User I/O pin
Контакт 166 I/O — User I/O pin
Контакт 167 I/O — User I/O pin
Контакт 168 I/O — User I/O pin
Контакт 169 I/O — User I/O pin
Контакт 170 I/O — User I/O pin
Контакт 171 I/O — User I/O pin
Контакт 172 I/O — User I/O pin
Контакт 173 I/O — User I/O pin
Контакт 174 I/O — User I/O pin
Контакт 175 I/O — User I/O pin
Контакт 176 I/O — User I/O pin
Контакт 177 I/O — User I/O pin
Контакт 178 I/O — User I/O pin
Контакт 179 I/O — User I/O pin
Контакт 180 I/O — User I/O pin
Контакт 181 I/O — User I/O pin
Контакт 182 I/O — User I/O pin
Контакт 183 I/O — User I/O pin
Контакт 184 I/O — User I/O pin
Контакт 185 I/O — User I/O pin
Контакт 186 I/O — User I/O pin
Контакт 187 I/O — User I/O pin
Контакт 188 I/O — User I/O pin
Контакт 189 I/O — User I/O pin
Контакт 190 I/O — User I/O pin
Контакт 191 I/O — User I/O pin
Контакт 192 I/O — User I/O pin
Контакт 193 I/O — User I/O pin
Контакт 194 I/O — User I/O pin
Контакт 195 I/O — User I/O pin
Контакт 196 I/O — User I/O pin
Контакт 197 I/O — User I/O pin
Контакт 198 I/O — User I/O pin
Контакт 199 I/O — User I/O pin
Контакт 200 I/O — User I/O pin
Контакт 201 I/O — User I/O pin
Контакт 202 I/O — User I/O pin
Контакт 203 I/O — User I/O pin
Контакт 204 I/O — User I/O pin
Контакт 205 I/O — User I/O pin
Контакт 206 I/O — User I/O pin
Контакт 207 I/O — User I/O pin
Контакт 208 I/O — User I/O pin

Типичное применение

EPM7256SQC208-10 подходит для 6 применениеs: Telecommunications Glue Logic, Industrial Control Interface Bridging, PCI Bus Address Decoding and Arbitration, Embedded System Glue Logic, Legacy Logic Replacement and Board Modernization, State Machine and Control Logic.

🌐

Telecommunications Glue Logic

The EPM7256SQC208-10 excels in telecom glue logic where deterministic timing, instant-on operation, and high I/O density are required. Its 256 macrocells and 164 I/O easily replace dozens of SSI/MSI logic packages for backplane address decoding, bus arbitration, and protocol conversion in central-office line cards. The 10 ns tPD suits telecom backplanes running at frequencies up to 100 MHz, and the 5V core (standard grade) drives legacy backplane drivers directly. In-system programmability via JTAG enables field upgrades and design iteration without removing components.

🏭

Industrial Control Interface Bridging

In factory automation, the EPM7256SQC208-10 bridges between legacy 5V PLCs, modern 3.3V microcontrollers, and fieldbus networks. Its 5V-tolerant I/O tolerates real-world industrial signal levels while the 256 macrocells implement multiple protocol converters (Modbus, Profibus, CAN glue logic) on one chip. Industrial-grade variants (EPM7256AQI208-10) extend the operating range to -40C to +85C for harsh factory floors. The EEPROM non-volatile storage means the device powers up instantly into a known-good state, critical for safety circuits.

🖥️

PCI Bus Address Decoding and Arbitration

The EPM7256SQC208-10 is explicitly PCI Local Bus Specification 2.2 compliant, making it ideal for motherboard address decoding, bus arbitration, and chip-select generation. The 164 I/O handle multiple PCI slots, and the 5 ns set-up time at 10 ns delay fits the 33 MHz PCI bus timing budget with margin. Replacing discrete 74F/74AS logic with this CPLD reduces board area, improves testability via JTAG, and provides a single component to modify when the address map changes.

🔧

Embedded System Glue Logic

Embedded designs using microprocessors, DSPs, or FPGAs often need glue logic for chip-select generation, wait-state insertion, reset distribution, and interrupt prioritization. The EPM7256SQC208-10 absorbs all this glue into one non-volatile device, replacing 5-10 discrete logic ICs. Its 5,000 usable gates handle full address decoding for 32-bit microprocessors plus peripheral control, and JTAG ISP allows the same board to ship with different address maps by reprogramming the CPLD.

✈️

Legacy Logic Replacement and Board Modernization

Many long-lifecycle products (military, aerospace, medical) cannot be redesigned, but their 74F/74AS logic is going obsolete. The EPM7256SQC208-10 implements the equivalent of 30-50 SSI/MSI packages in one chip, shrinking the BOM, reducing power, and adding testability. The 208-pin PQFP package accommodates designs with large I/O counts. Reprogramming the EEPROM allows engineering change orders (ECOs) without board respins.

⚡

State Machine and Control Logic

Complex state machines, sequencers, and pulse-width modulators fit naturally in the 256 macrocells of the EPM7256SQC208-10. The 175.4 MHz counter speed enables precise timing generation, and the deterministic tPD of 10 ns gives predictable state-transition timing without FPGA synthesis uncertainty. The 164 I/O accommodate multiple encoder/decoder interfaces, and JTAG boundary-scan testing verifies connections on assembled boards before functional test.

What is the EPM7256SQC208-10?
The EPM7256SQC208-10 is an Intel (formerly Altera) MAX 7000S family Complex Programmable Logic Device (CPLD) with 256 macrocells, 164 user I/O, 10 ns pin-to-pin propagation delay, in-system programmable EEPROM, and a 208-pin PQFP package. It is a non-volatile, instant-on programmable logic device used for glue logic, bus bridging, and state-machine control in embedded and telecom designs.
How many logic gates and macrocells does the EPM7256SQC208-10 have?
The EPM7256SQC208-10 contains 256 macrocells organized into 16 Logic Array Blocks (LABs) of 16 macrocells each, providing up to 5,000 usable gates. According to the MAX 7000S family documentation, this capacity is suitable for replacing dozens of discrete SSI/MSI logic packages and for implementing complex state machines, address decoders, and bus arbitration logic.
What is the propagation delay of the EPM7256SQC208-10?
The EPM7256SQC208-10 has a pin-to-pin propagation delay (tPD) of 10 ns. It is the slowest grade in the MAX 7000S family; the -6 and -7 grades offer 6 ns and 7 ns delays respectively for higher-speed designs. Counter speeds reach up to 175.4 MHz on the -10 grade according to the MAX 7000S datasheet.
Is the EPM7256SQC208-10 still in production?
No, the EPM7256SQC208-10 is marked obsolete and is no longer in active production. Inventory is limited to distributor stock and the secondary market. Engineers designing new products should consider the MAX II, MAX V, or MAX 10 CPLD families as modern alternatives.
What package does the EPM7256SQC208-10 use?
The EPM7256SQC208-10 is housed in a 208-pin Plastic Quad Flat Pack (PQFP), commonly designated SQC208. It is a surface-mount package with 164 usable user I/O pins distributed around the periphery.
Does the EPM7256SQC208-10 support in-system programming?
Yes, the EPM7256SQC208-10 supports in-system programmability (ISP) via the IEEE 1149.1 JTAG interface. The device uses EEPROM configuration memory, so configuration is non-volatile and the device powers up instantly without external boot memory, simplifying board design and field upgrades.
What is the difference between EPM7256SQC208-10 and EPM7256AEQC208-10N?
Both parts share the MAX 7000S family core and the same 208-pin PQFP footprint, but the EPM7256AEQC208-10N is the AEC (Altera Enhanced Core) revision, typically offering lower power and 3.3V core operation, and carries the 'N' lead-free / RoHS-compliant suffix. The original EPM7256SQC208-10 is a 5V-core commercial-grade device and may not be RoHS compliant.
What is the difference between EPM7256SQC208-10 and EPM7256SQC160-7?
The two parts differ in package pin count and speed grade: the EPM7256SQC208-10 uses a 208-pin PQFP with 10 ns delay, while the EPM7256SQC160-7 uses a 160-pin PQFP with a faster 7 ns delay. The smaller package offers fewer I/O (typically 132) and is suited for more compact designs; the -7 speed grade suits higher-clock logic designs.
What is the best drop-in replacement for EPM7256SQC208-10?
The best drop-in replacement is the EPM7256AEQC208-10N (AEC revision in the same SQC208 PQFP package with 256 macrocells and 10 ns delay). For RoHS compliance and modern alternatives, the MAX II EPM240 or MAX V 5M240Z CPLDs require PCB rework because they use a different package.
Where can I buy EPM7256SQC208-10 online?
The EPM7256SQC208-10 is available from authorized distributors including DigiKey (part number 544-1219-ND) and Mouser, plus authorized obsolete-component specialists such as Win Source, Xecor, Ampheo, Chip Inventory, and Microchip USA. As of 2026-09-13, pricing is around $28.50 unit, $11.20 at 1,000-piece quantities.
What is the price of EPM7256SQC208-10?
As of 2026-09-13, the EPM7256SQC208-10 lists at approximately $28.50 per unit in single-piece quantities. Volume pricing drops to about $11.20 per unit at 1,000-piece quantities. Because the part is obsolete, pricing varies by lot, date code, and distributor.
What is the lead time for EPM7256SQC208-10?
Lead time for the obsolete EPM7256SQC208-10 varies from immediate (DigiKey / Mouser existing stock) to 8-12 weeks from obsolete-component specialists, depending on available inventory. Distributors showing back-order status typically quote 6-10 weeks.
Is EPM7256SQC208-10 in stock at distributors?
Stock fluctuates because the EPM7256SQC208-10 is obsolete. As of 2026-09-13, DigiKey and Mouser list the part with limited inventory; obsolete-component specialists such as Win Source, Xecor, and Ampheo carry spot-market stock. Always confirm availability and date code before ordering.
Where can I download the EPM7256SQC208-10 datasheet PDF?
The official MAX 7000S datasheet is hosted by Intel at https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ds/m7000.pdf and covers all speed grades and packages including the EPM7256SQC208-10. Distributors such as DigiKey and Mouser also link to this PDF on their product detail pages.
What are the key specifications of the EPM7256SQC208-10 that engineers should know?
The EPM7256SQC208-10 has 256 macrocells, 16 LABs, 5,000 usable gates, 164 user I/O, 10 ns tPD propagation delay, 175.4 MHz counter speed, IEEE 1149.1 JTAG ISP, EEPROM non-volatile configuration, and a 208-pin PQFP package. It is part of the MAX 7000S family, supports 5V core operation on the standard -10 grade, and meets the PCI Local Bus Specification 2.2.

Справочные инженерные данные для EPM7256SQC208-10 — сравнение, рекомендации по проектированию и информация о соответствии.

Руководство по выбору

Choose the EPM7256SQC208-10 when you need a non-RoHS, 5V-core MAX 7000S CPLD with 256 macrocells for legacy designs, repair stock, or existing inventory. For new builds requiring RoHS compliance, choose the EPM7256AEQC208-10N (AEC revision, lead-free, same package). For industrial temperature applications, choose the EPM7256AQI208-10 (-40C to +85C). For designs with tight timing budgets that need 7 ns or 5 ns propagation delay, choose the EPM7256AEQI208-7N or EPM7256AEQC208-5N. All alternatives share the same 208-pin PQFP footprint, enabling PCB layout reuse across speed grades, temperature grades, and lead-free variants.

Сравнение с аналогами

Параметр Этот товар EPM7256AEQC208-10N EPM7256AQI208-10 EPM7256AEQI208-7N EPM7256AEQC208-5N EPM7256BQC208-7
Package 208-pin PQFP (SQC208) 208-pin PQFP (SQC208) - same 208-pin PQFP (SQC208) - same 208-pin PQFP (SQC208) - same 208-pin PQFP (SQC208) - same 208-pin PQFP (SQC208) - same
Brand Intel Intel Intel Intel Intel Intel
Series MAX 7000S MAX 7000S (AEC revision) MAX 7000S MAX 7000S (AEC revision) MAX 7000S (AEC revision) MAX 7000B
Macrocells 256 256 256 256 256 256
Propagation Delay (tPD) 10 ns 10 ns 10 ns 7 ns (faster) 5 ns (fastest) 7 ns
Temperature Grade Commercial (0C to +70C) Commercial Industrial (-40C to +85C) Industrial Commercial Commercial
Lead-Free / RoHS No (original, non-N suffix) Yes (N suffix) No Yes (N suffix) Yes (N suffix) No
User I/O Pins 164 164 164 164 164 164
Lifecycle Status Obsolete Obsolete Obsolete Obsolete Obsolete Obsolete

Ключевые отличия

  • Drop-in lead-free alternative with same die footprint (против EPM7256AEQC208-10N)
  • Industrial-temperature option available in same package (против EPM7256AQI208-10)
  • Faster speed-grade drop-ins available (против EPM7256AEQI208-7N)

Заметки по проектированию

The EPM7256SQC208-10 is a 5V-core device on the standard (non-AEC) revision. Provide a clean 5V VCC rail and add 0.1uF ceramic decoupling capacitors near every VCC pin (pins 7, 29, 47, 71, 93, 115, 137, 159) plus a bulk 10uF tantalum or electrolytic cap near the device. The AEC revision (EPM7256AEQC208-10N) supports 3.3V core operation; do not swap a standard -10 with an AEC variant without verifying the I/O voltage compatibility.

Route JTAG signals (TDI, TMS, TCK, TDO on pins 19-22) away from high-speed clocks and switching signals to avoid programming interference. Use a 4-wire JTAG header on the board for in-system programming during development. Add 10k pull-ups on TMS and TDI to keep the JTAG state machine in a known state during power-up.

The PQFP-208 package has relatively long leads (compared to modern QFN/BGA). Limit clock edges to 10 ns or slower; for faster clocks use the -7 (7 ns) or -5 (5 ns) speed grade. Place the CPLD near the devices it interfaces with, and use short direct traces for high-speed signals (clocks, bus arbitration) to minimize reflections.

Do not confuse the original EPM7256SQC208-10 (non-RoHS, 5V core) with the lead-free EPM7256AEQC208-10N (3.3V core AEC revision). The 'AE' prefix indicates the Enhanced Core. Also, do not mix up MAX 7000S with MAX 7000B (e.g. EPM7256BQC208-7) - both share the same 208-PQFP footprint and macrocell count but have different architecture revisions and timing characteristics.

Информация о соответствии

RoHS
Unknown
REACH
Unknown
AEC-Q100
Not Applicable
Без свинца
No
Без галогенов
Unknown
Конфликтные минералы
Unknown

The original EPM7256SQC208-10 is non-RoHS (no 'N' suffix). Choose EPM7256AEQC208-10N for RoHS/lead-free compliance. AEC-Q100 does not apply to commercial-grade MAX 7000S CPLDs; the AEC suffix indicates Altera Enhanced Core, not automotive qualification.

Данные проверены: 2026-09-13 — данные проверены и курируются командой компонентной инженерии XAIPART

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Связанные компоненты & термины

Intel Altera EPM7256SQC208-10 EPM7256AEQC208-10N EPM7256AQI208-10 EPM7256AEQI208-7N EPM7256AEQC208-5N EPM7256BQC208-7 MAX 7000S MAX 7000B CPLD Complex Programmable Logic Device EEPROM JTAG IEEE 1149.1 PCI Local Bus Specification PQFP Plastic Quad Flat Pack SQC208 macrocell Logic Array Block PIA Programmable Interconnect Array glue logic in-system programmability ISP
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