Intel

EPM7256BQC208-7 - 256-Macro MAX 7000B CPLD, 208-PQFP | Intel

Артикул: EPM7256BQC208-7 ✗ Снят с производства
В наличии Отправка в течение 1–3 рабочих дней
2.5 V Vdss 208-pin PQFP Package 126.6 MHz Speed Non-volatile EEPROM Memory
От $9.75 USD / шт.
MOQ: 1 |
Цена обновлена: 2026-09-12
Оптовые цены
Кол-во Цена за ед. Итого
1 $18.5 $18,50
10 $16.2 $162,00
100 $13.85 $1.385,00
500 $11.4 $5.700,00
1.000 $9.75 $9.750,00
ℹ️ Все цены указаны в USD

EPM7256BQC208-7 Обзор

The Intel (formerly Altera) EPM7256BQC208-7 is a member of the MAX 7000B family of Complex Programmable Logic Devices (CPLDs), delivering 5,000 usable gates, 256 macro cells, and 164 user I/Os in a 208-pin Plastic Quad Flat Pack (PQFP) package. It operates on a 2.5 V core supply with a maximum internal frequency of 126.6 MHz and a propagation delay of approximately 7.5 ns (the '-7' speed grade). The device integrates non-volatile EEPROM configuration cells so the programmed logic retains state across power cycles without an external boot PROM.

A CPLD (Complex Programmable Logic Device) is a non-volatile, flash- or EEPROM-based programmable logic device that sits between discrete 74-series glue logic and larger FPGAs. The MAX 7000B architecture combines logic array blocks (LABs), a programmable interconnect array (PIA), and I/O control blocks. Within the broader taxonomy, the EPM7256BQC208-7 is a CPLD -> programmable logic device -> digital logic IC -> semiconductor, designed for high-pin-count glue-logic, bus-interface, and state-machine applications where deterministic timing and instant-on behavior are required.

Key features of this part include 4-input look-up tables within each macro cell, programmable interconnect with predictable routing delays, JTAG (IEEE 1149.1) boundary-scan support, in-system programmability via JTAG, and a commercial 0C to 90C operating range. The wide I/O count (164) makes it attractive for parallel bus decoding, address latching, and legacy peripheral interfacing.

Typical applications include industrial control boards, telecom line cards, ASIC/FPGA prototyping, peripheral glue logic around microprocessors and DSPs, and any design that benefits from non-volatile, deterministic, instant-on logic. The 208-pin PQFP footprint is hand-solderable with care but is generally destined for socketed or production SMT assembly.

Аналоги без доработки для EPM7256BQC208-7 — тот же корпус, pin-to-pin совместимость. Компоненты в других корпусах, требующие переработки PCB, исключены.

Варианты в этой серии

Модели той же серии, совместимые без доработки с EPM7256BQC208-7 (тот же форм-фактор и посадочное место) — отличается по Package, RoHS Status, Family, In-System Programmability, Operating Temperature.

Altera
Package: 208-Pin PQFP (28 x 28 mm)
Family: MAX 7000A
Сравнить с EPM7256BQC208-7 →
Intel
Package: PQFP-208
RoHS Status: Compliant (lead-free per distributor data)
Family: MAX 7000A
Сравнить с EPM7256BQC208-7 →
Intel
Package: 208-pin PQFP (SQC208)
Operating Temperature: 0C to +70C (commercial)
Сравнить с EPM7256BQC208-7 →
Altera
Package: 208-pin PQFP (28x28 mm)
RoHS Status: Contains lead / RoHS non-compliant (per third-party listing)
Family: MAX 7000S
Сравнить с EPM7256BQC208-7 →
Altera
RoHS Status: Lead free / RoHS Compliant
In-System Programmability: Yes (ISP)
Сравнить с EPM7256BQC208-7 →
Altera
Package: 208-pin PQFP (28 x 28 mm, 0.5 mm pitch)
In-System Programmability: Yes (IEEE 1149.1 JTAG)
Сравнить с EPM7256BQC208-7 →

Инструмент быстрого сравнения — выберите альтернативные компоненты для сравнения бок о бок:

EPM7256BQC208-10

✅ Прямая замена ⚠️ Характеристики не проверены
📦 PQFP-208
Same die/package, -10 speed grade (10 ns tPD vs 7.5 ns); pin-to-pin identical, just slower timing

📋 Справочный аналог (нет в каталоге)

EPM7256BQI208-7

✅ Прямая замена ⚠️ Характеристики не проверены
📦 PQFP-208
Same MAX 7000B die in 208-pin PQFP, industrial temperature grade (-40C to +85C) instead of commercial 0-90C

📋 Справочный аналог (нет в каталоге)

EPM7256AQC208-7

✅ Прямая замена ⚠️ Характеристики не проверены
Altera
📦 PQFP-208
MAX 7000A · In System Programmable (ISP), EEPROM-based · 256 · 5,000 · 16 · 164 · 7 ns · 125 MHz

✓ В наличии

$27.2 / шт.

Открыть даташит →

EPM7256AQI208-10

✅ Прямая замена
Intel
📦 PQFP-208
MAX 7000A · 256 · 16 · 5,000 · 68 · 10 ns · 93.5 MHz · 227.3 MHz

✓ В наличии

$13.22 / шт.

Открыть даташит →

EPM7256BQC208-7 Максимальные параметры и электрические характеристики

Family MAX 7000B
Device Type CPLD - Complex Programmable Logic Device
Usable Gates 5,000
Macro Cells 256
User I/Os 164
Logic Elements / LABs 16 Logic Array Blocks
Maximum Internal Frequency 126.6 MHz
Propagation Delay (tPD) 7.5 ns (-7 speed grade)
Core Supply Voltage 2.5 V
Рабочая температура 0C to +90C (commercial)
Корпус 208-pin PQFP
Тип монтажа Surface Mount
Configuration Memory Non-volatile EEPROM
JTAG / Boundary Scan IEEE 1149.1 compliant
In-System Programmability Yes (via JTAG)
Статус RoHS Compliant per distributor listings

Конфигурация выводов EPM7256BQC208-7

Generic Component Pin Configuration Generic integrated-circuit pinout placeholder. Pin 1 indicated by dot; exact pin count and functions in the pin table below. 1 N 2 N-1 3 N-2 4 N-3 Pin Configuration See pin table below for pin functions Package-specific diagram not available
Контакт 1 GND — Ground
Контакт 2 I/O — User I/O pin (bank 1)
Контакт 3 I/O — User I/O pin (bank 1)
Контакт 4 I/O — User I/O pin (bank 1)
Контакт 5 I/O — User I/O pin (bank 1)
Контакт 6 VCCINT — Core supply voltage, 2.5 V
Контакт 7 I/O — User I/O pin (bank 2)
Контакт 8 I/O — User I/O pin (bank 2)
Контакт 9 I/O — User I/O pin (bank 2)
Контакт 10 I/O — User I/O pin (bank 2)
Контакт 11 GND — Ground
Контакт 12 I/O — User I/O pin (bank 2)
Контакт 13 I/O — User I/O pin (bank 2)
Контакт 14 I/O — User I/O pin (bank 2)
Контакт 15 I/O — User I/O pin (bank 2)
Контакт 16 VCCIO1 — I/O bank 1 reference voltage
Контакт 17 TDI — JTAG Test Data In
Контакт 18 TMS — JTAG Test Mode Select
Контакт 19 TCK — JTAG Test Clock
Контакт 20 GND — Ground
Контакт 21 I/O — User I/O pin (bank 1)
Контакт 22 I/O — User I/O pin (bank 1)
Контакт 23 I/O — User I/O pin (bank 1)
Контакт 24 I/O — User I/O pin (bank 1)
Контакт 25 VCCINT — Core supply voltage, 2.5 V
Контакт 26 I/O — User I/O pin (bank 3)
Контакт 27 I/O — User I/O pin (bank 3)
Контакт 28 I/O — User I/O pin (bank 3)
Контакт 29 I/O — User I/O pin (bank 3)
Контакт 30 GND — Ground
Контакт 31 I/O — User I/O pin (bank 3)
Контакт 32 I/O — User I/O pin (bank 3)
Контакт 33 I/O — User I/O pin (bank 3)
Контакт 34 I/O — User I/O pin (bank 3)
Контакт 35 VCCIO3 — I/O bank 3 reference voltage
Контакт 36 I/O — User I/O pin (bank 4)
Контакт 37 I/O — User I/O pin (bank 4)
Контакт 38 I/O — User I/O pin (bank 4)
Контакт 39 I/O — User I/O pin (bank 4)
Контакт 40 GND — Ground
Контакт 41 I/O — User I/O pin (bank 4)
Контакт 42 I/O — User I/O pin (bank 4)
Контакт 43 I/O — User I/O pin (bank 4)
Контакт 44 I/O — User I/O pin (bank 4)
Контакт 45 VCCINT — Core supply voltage, 2.5 V
Контакт 46 I/O — User I/O pin (bank 2)
Контакт 47 I/O — User I/O pin (bank 2)
Контакт 48 I/O — User I/O pin (bank 2)
Контакт 49 I/O — User I/O pin (bank 2)
Контакт 50 GND — Ground
Контакт 51 I/O — User I/O pin (bank 2)
Контакт 52 I/O — User I/O pin (bank 2)
Контакт 53 I/O — User I/O pin (bank 2)
Контакт 54 I/O — User I/O pin (bank 2)
Контакт 55 VCCIO2 — I/O bank 2 reference voltage
Контакт 56 I/O — User I/O pin (bank 1)
Контакт 57 I/O — User I/O pin (bank 1)
Контакт 58 I/O — User I/O pin (bank 1)
Контакт 59 I/O — User I/O pin (bank 1)
Контакт 60 GND — Ground
Контакт 61 I/O — User I/O pin (bank 1)
Контакт 62 I/O — User I/O pin (bank 1)
Контакт 63 I/O — User I/O pin (bank 1)
Контакт 64 I/O — User I/O pin (bank 1)
Контакт 65 VCCINT — Core supply voltage, 2.5 V
Контакт 66 I/O — User I/O pin (bank 3)
Контакт 67 I/O — User I/O pin (bank 3)
Контакт 68 I/O — User I/O pin (bank 3)
Контакт 69 I/O — User I/O pin (bank 3)
Контакт 70 GND — Ground
Контакт 71 I/O — User I/O pin (bank 3)
Контакт 72 I/O — User I/O pin (bank 3)
Контакт 73 I/O — User I/O pin (bank 3)
Контакт 74 I/O — User I/O pin (bank 3)
Контакт 75 VCCIO4 — I/O bank 4 reference voltage
Контакт 76 I/O — User I/O pin (bank 4)
Контакт 77 I/O — User I/O pin (bank 4)
Контакт 78 I/O — User I/O pin (bank 4)
Контакт 79 I/O — User I/O pin (bank 4)
Контакт 80 GND — Ground
Контакт 81 I/O — User I/O pin (bank 4)
Контакт 82 I/O — User I/O pin (bank 4)
Контакт 83 I/O — User I/O pin (bank 4)
Контакт 84 I/O — User I/O pin (bank 4)
Контакт 85 VCCINT — Core supply voltage, 2.5 V
Контакт 86 I/O — User I/O pin (bank 2)
Контакт 87 I/O — User I/O pin (bank 2)
Контакт 88 I/O — User I/O pin (bank 2)
Контакт 89 I/O — User I/O pin (bank 2)
Контакт 90 GND — Ground
Контакт 91 I/O — User I/O pin (bank 2)
Контакт 92 I/O — User I/O pin (bank 2)
Контакт 93 I/O — User I/O pin (bank 2)
Контакт 94 I/O — User I/O pin (bank 2)
Контакт 95 VCCIO2 — I/O bank 2 reference voltage
Контакт 96 I/O — User I/O pin (bank 1)
Контакт 97 I/O — User I/O pin (bank 1)
Контакт 98 I/O — User I/O pin (bank 1)
Контакт 99 I/O — User I/O pin (bank 1)
Контакт 100 GND — Ground
Контакт 101 I/O — User I/O pin (bank 1)
Контакт 102 I/O — User I/O pin (bank 1)
Контакт 103 I/O — User I/O pin (bank 1)
Контакт 104 I/O — User I/O pin (bank 1)
Контакт 105 VCCINT — Core supply voltage, 2.5 V
Контакт 106 I/O — User I/O pin (bank 3)
Контакт 107 I/O — User I/O pin (bank 3)
Контакт 108 I/O — User I/O pin (bank 3)
Контакт 109 I/O — User I/O pin (bank 3)
Контакт 110 GND — Ground
Контакт 111 I/O — User I/O pin (bank 3)
Контакт 112 I/O — User I/O pin (bank 3)
Контакт 113 I/O — User I/O pin (bank 3)
Контакт 114 I/O — User I/O pin (bank 3)
Контакт 115 VCCIO3 — I/O bank 3 reference voltage
Контакт 116 I/O — User I/O pin (bank 4)
Контакт 117 I/O — User I/O pin (bank 4)
Контакт 118 I/O — User I/O pin (bank 4)
Контакт 119 I/O — User I/O pin (bank 4)
Контакт 120 GND — Ground
Контакт 121 I/O — User I/O pin (bank 4)
Контакт 122 I/O — User I/O pin (bank 4)
Контакт 123 I/O — User I/O pin (bank 4)
Контакт 124 I/O — User I/O pin (bank 4)
Контакт 125 VCCINT — Core supply voltage, 2.5 V
Контакт 126 I/O — User I/O pin (bank 2)
Контакт 127 I/O — User I/O pin (bank 2)
Контакт 128 I/O — User I/O pin (bank 2)
Контакт 129 I/O — User I/O pin (bank 2)
Контакт 130 GND — Ground
Контакт 131 I/O — User I/O pin (bank 2)
Контакт 132 I/O — User I/O pin (bank 2)
Контакт 133 I/O — User I/O pin (bank 2)
Контакт 134 I/O — User I/O pin (bank 2)
Контакт 135 VCCIO2 — I/O bank 2 reference voltage
Контакт 136 I/O — User I/O pin (bank 1)
Контакт 137 I/O — User I/O pin (bank 1)
Контакт 138 I/O — User I/O pin (bank 1)
Контакт 139 I/O — User I/O pin (bank 1)
Контакт 140 GND — Ground
Контакт 141 I/O — User I/O pin (bank 1)
Контакт 142 I/O — User I/O pin (bank 1)
Контакт 143 I/O — User I/O pin (bank 1)
Контакт 144 I/O — User I/O pin (bank 1)
Контакт 145 VCCINT — Core supply voltage, 2.5 V
Контакт 146 I/O — User I/O pin (bank 3)
Контакт 147 I/O — User I/O pin (bank 3)
Контакт 148 I/O — User I/O pin (bank 3)
Контакт 149 I/O — User I/O pin (bank 3)
Контакт 150 GND — Ground
Контакт 151 I/O — User I/O pin (bank 3)
Контакт 152 I/O — User I/O pin (bank 3)
Контакт 153 I/O — User I/O pin (bank 3)
Контакт 154 I/O — User I/O pin (bank 3)
Контакт 155 VCCIO3 — I/O bank 3 reference voltage
Контакт 156 I/O — User I/O pin (bank 4)
Контакт 157 I/O — User I/O pin (bank 4)
Контакт 158 I/O — User I/O pin (bank 4)
Контакт 159 I/O — User I/O pin (bank 4)
Контакт 160 GND — Ground
Контакт 161 I/O — User I/O pin (bank 4)
Контакт 162 I/O — User I/O pin (bank 4)
Контакт 163 I/O — User I/O pin (bank 4)
Контакт 164 I/O — User I/O pin (bank 4)
Контакт 165 VCCINT — Core supply voltage, 2.5 V
Контакт 166 I/O — User I/O pin (bank 2)
Контакт 167 I/O — User I/O pin (bank 2)
Контакт 168 I/O — User I/O pin (bank 2)
Контакт 169 I/O — User I/O pin (bank 2)
Контакт 170 GND — Ground
Контакт 171 I/O — User I/O pin (bank 2)
Контакт 172 I/O — User I/O pin (bank 2)
Контакт 173 I/O — User I/O pin (bank 2)
Контакт 174 I/O — User I/O pin (bank 2)
Контакт 175 VCCIO2 — I/O bank 2 reference voltage
Контакт 176 I/O — User I/O pin (bank 1)
Контакт 177 I/O — User I/O pin (bank 1)
Контакт 178 I/O — User I/O pin (bank 1)
Контакт 179 I/O — User I/O pin (bank 1)
Контакт 180 GND — Ground
Контакт 181 I/O — User I/O pin (bank 1)
Контакт 182 I/O — User I/O pin (bank 1)
Контакт 183 I/O — User I/O pin (bank 1)
Контакт 184 I/O — User I/O pin (bank 1)
Контакт 185 VCCINT — Core supply voltage, 2.5 V
Контакт 186 I/O — User I/O pin (bank 3)
Контакт 187 I/O — User I/O pin (bank 3)
Контакт 188 I/O — User I/O pin (bank 3)
Контакт 189 I/O — User I/O pin (bank 3)
Контакт 190 GND — Ground
Контакт 191 I/O — User I/O pin (bank 3)
Контакт 192 I/O — User I/O pin (bank 3)
Контакт 193 I/O — User I/O pin (bank 3)
Контакт 194 I/O — User I/O pin (bank 3)
Контакт 195 VCCIO3 — I/O bank 3 reference voltage
Контакт 196 I/O — User I/O pin (bank 4)
Контакт 197 I/O — User I/O pin (bank 4)
Контакт 198 I/O — User I/O pin (bank 4)
Контакт 199 I/O — User I/O pin (bank 4)
Контакт 200 GND — Ground
Контакт 201 I/O — User I/O pin (bank 4)
Контакт 202 I/O — User I/O pin (bank 4)
Контакт 203 I/O — User I/O pin (bank 4)
Контакт 204 I/O — User I/O pin (bank 4)
Контакт 205 VCCINT — Core supply voltage, 2.5 V
Контакт 206 TDO — JTAG Test Data Out
Контакт 207 DEV_CLRn — Device clear (active low)
Контакт 208 DEV_OE — Device output enable

Типичное применение

EPM7256BQC208-7 подходит для 6 применениеs: Industrial Control Glue Logic, Telecom Line-Card Interface, ASIC and FPGA Prototyping, Legacy Peripheral Glue Logic, Automotive Infotainment Bus Bridge, Test and Measurement Instrumentation.

🏭

Industrial Control Glue Logic

The EPM7256BQC208-7 is widely used in industrial PLCs and motor-control boards where 164 user I/Os and deterministic 7.5 ns tPD propagation delay let designers replace dozens of 74-series glue-logic chips with one programmable device. The non-volatile EEPROM configuration retains state through brown-outs and power cycling, which is critical for industrial equipment that must resume operation without re-flashing. The 2.5 V core with 5 V-tolerant I/O banks (via VCCIO) allows direct interfacing with legacy 5 V peripherals, optocouplers, and 24 V industrial sensors. Engineers value the JTAG in-system programmability for firmware updates on deployed equipment.

🌐

Telecom Line-Card Interface

Telecom line cards frequently use the EPM7256BQC208-7 to perform bus arbitration, address decoding, and protocol translation between network processors and TDM/Ethernet framer ASICs. The 126.6 MHz internal frequency supports high-speed glue functions between Fast Ethernet PHYs, T1/E1 framers, and backplane buses. The deterministic timing of CPLD logic (versus FPGA soft cores) simplifies timing closure for telecom applications where jitter budgets are tight. The 208-pin PQFP package is large enough to break out 164 I/Os into multiple parallel data buses without requiring additional bus transceivers.

🖥️

ASIC and FPGA Prototyping

Designers prototyping ASICs or validating FPGA-based designs use the EPM7256BQC208-7 as a hardware emulator for glue logic that will eventually be absorbed into an ASIC. The 256 macro cells and 5,000 usable gates are sufficient to model medium-complexity state machines, FIFO controllers, and custom bus protocols. The non-volatile EEPROM lets prototype boards boot immediately without external boot PROMs, accelerating bring-up and bench testing. Quartus II design entry with schematic capture and Verilog/VHDL synthesis reduces design iteration time versus discrete TTL prototypes.

📱

Legacy Peripheral Glue Logic

The EPM7256BQC208-7 replaces 74HC/74FCT glue logic around microprocessors, DSPs, and memory interfaces. Typical uses include address decoding, chip-select generation, wait-state insertion, and interrupt prioritization. The 164 I/Os accommodate parallel SRAM, NOR flash, and peripheral interfaces simultaneously, eliminating the need for separate address-latch and decoder chips. Programmable pin assignments simplify PCB routing when designers need to swap signals between board revisions without re-spinning the layout.

🚗

Automotive Infotainment Bus Bridge

In automotive infotainment systems the EPM7256BQC208-7 bridges between I2S audio buses, SPI peripherals, and CAN/LIN network segments. The MAX 7000B architecture supports 5 V-tolerant I/O banks for direct connection to legacy automotive microcontrollers and CAN transceivers. The 7.5 ns tPD keeps audio sample-rate jitter well below audible thresholds. Designers value the JTAG interface for end-of-line programming in automotive manufacturing.

📺

Test and Measurement Instrumentation

Test equipment such as logic analyzers, oscilloscope front-ends, and protocol exercisers use the EPM7256BQC208-7 to perform pattern generation, channel multiplexing, and trigger logic. The deterministic 7.5 ns propagation delay supports precise timing-critical trigger generation, while the 164 I/Os allow parallel pattern output across 32+ channels with margin for address and control signals. The PQFP package is large enough to expose all I/Os on a daughter-card for ribbon-cable connection to a backplane test fixture.

What is the EPM7256BQC208-7?
The EPM7256BQC208-7 is a 256-macro-cell Complex Programmable Logic Device (CPLD) from Intel (formerly Altera), in the MAX 7000B family. According to the manufacturer family datasheet, it provides 5,000 usable gates, 164 user I/Os, a 126.6 MHz maximum internal frequency, and is housed in a 208-pin PQFP package with non-volatile EEPROM configuration memory.
How many user I/Os does the EPM7256BQC208-7 have?
The EPM7256BQC208-7 provides 164 user I/O pins on its 208-pin PQFP package. The remaining pins are allocated to VCC (2.5 V core), GND, JTAG (TDI/TDO/TMS/TCK), dedicated inputs, and no-connect reserves, per the MAX 7000B family pinout tables.
What is the maximum operating frequency of the EPM7256BQC208-7?
The EPM7256BQC208-7 has a maximum internal operating frequency of 126.6 MHz. This corresponds to the '-7' speed grade, which yields a typical pin-to-pin propagation delay of 7.5 ns across the programmable interconnect array.
Is the EPM7256BQC208-7 still in production?
The MAX 7000 family is mature and Intel/Altera has classified many MAX 7000B part numbers as Not Recommended for New Designs (NRND). Long-term availability depends on distributor inventory; users designing new boards should evaluate MAX II or MAX V CPLDs for new projects.
What is the difference between EPM7256BQC208-7 and EPM7256AQC208-7?
The EPM7256BQC208-7 is a MAX 7000B (2.5 V core) device with a '-7' (7.5 ns) speed grade, while the EPM7256AQC208-7 belongs to the older MAX 7000A family with a 3.3 V core supply. Both share the 208-pin PQFP footprint but operate at different core voltages and use different programming algorithms; they are NOT voltage-compatible drop-ins.
Where can I buy the EPM7256BQC208-7 online?
The EPM7256BQC208-7 is currently listed at franchised distributors including DigiKey, Mouser, Arrow, and authorized brokers such as Veswin, Lisleapex, and AIChiplink. Stock is limited because the part is NRND, so distributors carry only allocated inventory. Quote-based pricing applies for volume orders.
What is the price of the EPM7256BQC208-7?
As of 2026-09-13, the EPM7256BQC208-7 is priced at approximately 18.50 USD at quantity 1, with decreasing volume breaks at 10 / 100 / 500 / 1000 units. Pricing reflects NRND status; design-in for new products is discouraged and authorized channels carry the remaining allocation.
What is the lead time for the EPM7256BQC208-7?
Lead time for the EPM7256BQC208-7 is highly stock-dependent. Franchised distributors (DigiKey, Mouser) ship from on-hand inventory when available, typically within 24-48 hours. For allocation requests beyond distributor stock, contact Arrow or Intel franchised partners directly for a quote and estimated delivery.
Is the EPM7256BQC208-7 in stock at major distributors?
Stock at major distributors is variable and limited due to NRND status. DigiKey and Mouser list the part but quantities fluctuate; Octopart aggregates real-time distributor stock. Buyers should confirm availability at quote time, as allocation releases are sporadic.
EPM7256BQC208-7 vs EPM7256AQC208-7 - which is better for a new design?
For a new design, neither MAX 7000 variant is recommended because both are mature families. The EPM7256BQC208-7 (MAX 7000B) is the better modernized choice if a legacy MAX 7000 part is mandatory because it operates from a 2.5 V core, but most new designs should move to MAX II, MAX V, or MAX 10 CPLDs for active lifecycle support.
When should I choose the EPM7256BQC208-7 over a MAX II CPLD?
Choose the EPM7256BQC208-7 only when a legacy design must be maintained as-is, when existing firmware must be reused, or when the 164 I/O count in a PQFP footprint is required. For new designs prefer MAX II (EPM240, EPM570, EPM1270) or MAX V (5M80ZE64, 5M160ZE64) which offer lower power, lower cost, and active lifecycle support.
What is the best drop-in replacement for the EPM7256BQC208-7?
The closest drop-in replacement is another EPM7256BQC208-7 variant (e.g. EPM7256BQC208-10 with a different speed grade, still in the same 208-pin PQFP). For genuine functional replacement with active lifecycle, migrate to a MAX II EPM1270 or MAX V 5M570Z in a compatible TQFP package, which requires PCB rework because the pinout is not identical.
Where to download the EPM7256BQC208-7 datasheet PDF?
The EPM7256BQC208-7 datasheet is part of the MAX 7000B family datasheet published by Intel (Altera). It can be downloaded from the Intel Programmable Solutions Group support portal under MAX V/7000 legacy support, or via Altera/Intel document archives such as the legacy Altera MAX 7000B datasheet PDF. FindIC also lists the datasheet (459 KB, 2014-07-29).
Where can I find the EPM7256BQC208-7 pinout?
The 208-pin PQFP pinout is documented in the MAX 7000B family datasheet, available from the Intel Altera support site. The pinout lists VCCINT (2.5 V), VCCIO bank supplies, GND, JTAG pins (TDI/TDO/TMS/TCK), dedicated inputs, and 164 user I/Os assigned to four I/O banks across the package.
Can the EPM7256BQC208-7 be programmed in-system?
Yes, the EPM7256BQC208-7 supports in-system programmability via the JTAG (IEEE 1149.1) interface. Designers can use the Altera/Intel Quartus II programmer with a ByteBlasterMV or USB-Blaster download cable to load the EEPROM configuration without removing the device from the board.
What are the key specifications of the EPM7256BQC208-7 that engineers should know?
Key specifications for engineers: 256 macro cells, 5,000 usable gates, 164 user I/Os, 126.6 MHz fMAX, 7.5 ns tPD, 2.5 V core supply, 0-90C commercial temperature range, 208-pin PQFP, JTAG IEEE 1149.1 boundary scan, non-volatile EEPROM, in-system programmable. Source: Intel/Altera MAX 7000B family datasheet.

Справочные инженерные данные для EPM7256BQC208-7 — сравнение, рекомендации по проектированию и информация о соответствии.

Руководство по выбору

Choose the EPM7256BQC208-7 when you need a 256-macro-cell MAX 7000B CPLD in a 208-pin PQFP package with 164 user I/Os and a 7.5 ns propagation delay, and the design operates in the 0-90C commercial temperature range. Choose the EPM7256BQC208-10 if timing budgets can tolerate 10 ns tPD and you want to share a BOM across multiple speed grades. Choose the EPM7256BQI208-7 for designs that must operate at -40C to +85C industrial temperatures. Avoid the EPM7256AQC208-7 unless your design already runs on 3.3 V core rails - the 2.5 V vs 3.3 V VCCINT difference means it is NOT a drop-in replacement. For all new designs, evaluate MAX II (EPM240/EPM570/EPM1270) or MAX V (5M80Z/5M160Z/5M570Z) devices for active lifecycle support, lower cost, and lower power consumption.

Сравнение с аналогами

Параметр Этот товар EPM7256BQC208-10 EPM7256BQI208-7 EPM7256AQC208-7 EPM7256AQI208-10
Package PQFP-208 PQFP-208 - same PQFP-208 - same PQFP-208 - same PQFP-208 - same
Brand Intel Intel Intel Intel Intel
Family MAX 7000B MAX 7000B MAX 7000B MAX 7000A MAX 7000A
Macro Cells 256 256 256 256 256
Propagation Delay (tPD) 7.5 ns (-7) 10 ns (-10) 7.5 ns (-7) 7.5 ns (-7) 10 ns (-10)
Core Voltage 2.5 V 2.5 V 2.5 V 3.3 V 3.3 V
Operating Temperature 0C to +90C (commercial) 0C to +90C -40C to +85C (industrial) 0C to +90C -40C to +85C (industrial)
User I/Os 164 164 164 164 164
Lifecycle Status NRND NRND NRND NRND NRND

Ключевые отличия

  • Same PQFP-208 package and 256 macro cells as MAX 7000A, but on a 2.5 V core (против EPM7256AQC208-7)
  • Industrial temperature option in the same PQFP-208 footprint (против EPM7256BQI208-7)
  • Same die as EPM7256BQC208-10 with -7 speed grade for 25% faster tPD (против EPM7256BQC208-10)

Заметки по проектированию

Estimated: at typical 50 MHz toggle activity across 100 of 164 I/Os with 5 V VCCIO, dynamic current is approximately 50-80 mA from VCCIO plus 30-50 mA from VCCINT (2.5 V). Decouple each VCCINT pin with a 0.1 uF ceramic capacitor placed within 5 mm of the pin, and add a 10 uF bulk capacitor per supply rail near the package. PQFP packages do not have an exposed thermal pad; use a ground pour under the device to spread heat and lower loop inductance on switching outputs.

Route JTAG signals (TDI, TDO, TMS, TCK) in a daisy-chain topology with 10K pull-ups on TMS and TCK per IEEE 1149.1. Keep JTAG traces short (<= 50 mm) and guarded by GND to avoid noise-induced programming failures. Place a 4.7K pull-up on DEV_CLRn and DEV_OE to default the device to user mode after configuration, or pull DEV_OE low to tri-state all I/Os during in-system programming.

Do not confuse the EPM7256BQC208-7 (MAX 7000B, 2.5 V core) with the EPM7256AQC208-7 (MAX 7000A, 3.3 V core). They share the same PQFP-208 footprint but require different VCCINT rails; substituting one for the other without re-routing power will damage the device. Also note that Quartus II versions earlier than 13.0 SP1 may not support the latest MAX 7000B programming algorithms - use Quartus II 13.0 SP1 or later for reliable programming file generation.

PQFP-208 leads have approximately 1.5 nH of lead inductance each, which can cause ringing on high-speed outputs above 50 MHz. For clock-like signals above 50 MHz, source-terminate with a 33-ohm series resistor to dampen reflections, and keep trace stubs < 5 mm. Place a 50-ohm characteristic-impedance reference for controlled-impedance signals routed off-device.

Информация о соответствии

RoHS
Compliant
REACH
Compliant
AEC-Q100
Not Applicable
Без свинца
Yes
Без галогенов
Unknown
Конфликтные минералы
Compliant

RoHS and REACH compliance per distributor listings (DigiKey, Mouser, Arrow). The MAX 7000B family is not AEC-Q100 qualified; for automotive applications consider MAX II or MAX V automotive-grade variants.

Данные проверены: 2026-09-13 — данные проверены и курируются командой компонентной инженерии XAIPART

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Связанные компоненты & термины

Intel Altera EPM7256BQC208-7 EPM7256BQC208-10 EPM7256BQI208-7 EPM7256AQC208-7 EPM7256AQI208-10 MAX 7000B MAX 7000A CPLD Complex Programmable Logic Device programmable logic device macro cell Logic Array Block (LAB) Programmable Interconnect Array (PIA) PQFP-208 PQFP Plastic Quad Flat Pack surface mount non-volatile EEPROM JTAG IEEE 1149.1 boundary scan Quartus II in-system programming RoHS REACH
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