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What Saras Micro Devices' substrate-embedded passives mean for AI accelerator power delivery

Saras Micro Devices' STILE module moves decoupling capacitors into the package substrate to shorten the VRM-to-load path and free PCB underside real estate for vertical power delivery in AI accelerators.

Nai-publish Nai-update 4 min basahin ✓ AI-handa Ibahagi

TL;DR — tatlong pangungusap

  • Saras Micro Devices' STILE technology embeds capacitors into the IC package substrate or PCB, freeing the board underside for vertical power delivery. (S1)
  • AI accelerator TDP is at multiple kilowatts with core voltages of 0.6-0.8 V, so PDN current and resistive losses are rising sharply. (S1)
  • STILE capacitors use 3D pass-through copper terminations, are rated for 125°C operation and reportedly show almost no derating under temperature and bias. (S1)

Nagmula sa key_takeaways (tunay na field, maksimum 3 entri). Ang katotohanan at pagsusuri ay nababagong label

What Saras Micro Devices' substrate-embedded passives mean for AI accelerator power delivery — Semiconductor News news briefEditorial cover for a Semiconductor News brief. Power motif; headline "What Saras Micro Devices' substrate-embedded passives mean for AI accelerator power delivery". Reported key numbers: 12 V. 1 cited source. Static cover (no animation).SEMICONDUCTOR NEWS · NEWS BRIEFWhat Saras Micro Devices'substrate-embedded passives mean for AIaccelerator power deliveryREPORTED KEY NUMBERS12 V1 sourceXAIPART
Cover image generated from data already shown on this page: the category motif, the headline, and reported key numbers. No decorative illustration; no third-party image.

Nagsi dating sa isang sagot ng AI — ito ang verifiable na orihinal

Ang isang AI summary ay maaaring natalampas ang batayan para sa mga pahayag nito. Ang orihinal na hula, ang naapektuhan na bahagi at bawat pagtutukoy ay nasa pahina na, bawat isa ay maaaring hinikayat sa kanyang pinagmulan.

Pahayag ng XAIPART

Ang maikling ulat na ito ay may isang falsifiable forecast.

Naapektuhan na bahagi

Wala ng pagtutugma sa kuwento na ito — walang ipinapakita sa halip na inilagay ang pagtugma

Reported by 3D InCites on 2026-10-06. Summarized and analyzed by XAIPART Editorial.

What happened

Power electronics vendors are racing to deliver voltage regulators that can handle the multi-kilowatt currents required by AI GPUs and HPC accelerators, but the surrounding discrete inductors and capacitors are starting to dominate board real estate and limit performance.S1

The article describes power delivery as a stack of conversion losses from the rack to the die. Most data center racks use a 54-V/48-V backplane; accelerator boards then drop to 12 V through a 48-to-12-V VRM, followed by lateral 12-V-to-POL VRMs around the chip. As chips move to advanced process nodes, core voltages fall to 0.6-0.8 V while thermal design power (TDP) climbs to multiple kilowatts, so the PDN current P/V rises sharply and resistive (I²R) losses grow exponentially with it.S1

Saras Micro Devices' STILE technology integrates capacitors (and, in future generations, inductors) into the IC package substrate or PCB rather than mounting them on the surface. The capacitors are made to match the substrate thickness, use 3D pass-through copper terminations, show almost no capacitance derating under temperature and bias, and are rated for operation at 125°C.S1 Today's STILE parts target output capacitance for VRMs serving extreme transient loads; a higher-frequency generation with both decoupling capacitance and inductance is under development.S1

The article frames STILE as an enabler for vertical power delivery (VPD). Because the underside of today's boards is crowded with surface-mount decoupling capacitors, those parts block the move of VRMs directly under the chip. Embedding passives inside the substrate or PCB frees the underside for VPD and shortens the regulator-to-load path, reducing parasitic resistance and inductance.S1 Shaun Bowers, SVP of Product Management at Saras Micro Devices, expects the PDN to evolve first toward VPD, then toward higher rack and intermediate voltages, and eventually toward integrated voltage regulators (IVRs) inside the package or on the die, with VPD remaining the front-end stage for those IVRs.S1

Key numbers
MetricReported valueSource
Rack backplane voltage54 V / 48 V[S1]
Board-level intermediate rail12 V[S1]
Processor core operating voltage0.6 to 0.8 V[S1]
Thermal design power range citedMultiple kilowatts per device[S1]
Data center power scale citedApproaching gigawatt level[S1]
STILE capacitor operating temperature rating125°C[S1]
Capacitance derating vs temperature/biasReported as almost none[S1]
Higher-frequency STILE generationNot disclosed (under development)[S1]

Background timeline

  1. No prior milestones disclosed by the source.

XAIPART take

Technical impact

Embedding output-stage capacitance directly under the die cuts the loop inductance and resistance between the last VRM stage and the silicon, which is exactly the regime where AI accelerator transients cause the largest voltage excursions. XAIPART analysis Pairing STILE-class parts with a 48-V-to-POL topology lets designers push the first high-frequency conversion step closer to the load, but thermal co-design becomes the gating issue: every part in the PDN now sits inside the package's hot-spot envelope, and CTE mismatch between copper, substrate laminate and the silicon die can dominate warpage at reflow.

Market impact

The bottleneck narrative in this brief is consistent with what hyperscalers have been signaling on 48-V rack architectures and VPD, but the article is one vendor's viewpoint and one interview. XAIPART analysis If substrate-embedded passives reach volume, the displaced surface-mount MLCC and power-inductor lines serving accelerator boards face a structural demand shift, while substrate and PCB manufacturers gain a higher-value embedding step. Sourcing teams should expect STILE-grade parts to remain single-source for at least the next design cycle.

Action

For procurement, request samples and a roadmap from Saras Micro Devices for STILE output-capacitance parts and the higher-frequency capacitor-plus-inductor generation before locking the PDN bill of materials. XAIPART analysis For design, evaluate VPD feasibility jointly with the embedded-passive supplier so the PCB underside is reserved for VRM landing, and add a 125°C derating check, reflow-profile warpage budget and CTE map to the package-level PDN review.

XAIPART Forecast

If a major hyperscaler or accelerator OEM publicly references Saras Micro Devices STILE in a shipping reference design by 2027-09-30, XAIPART expects at least two competing embedded-passive suppliers (existing MLCC or advanced-substrate vendors) to announce competing package-substrate-embedded PDN products within 9 months of that disclosure; otherwise this forecast is wrong. XAIPART analysis

Facts are as reported by the cited source. The design-in, sourcing and forward-looking statements above are XAIPART's analysis, not the source's claims. Uncertainty: this brief rests on a single interview-based article from one vendor (Saras Micro Devices) and one executive; product roadmap, volume, pricing and customer adoption are not disclosed.

Corrections: none at publication. This brief will be updated with a timestamp if the source corrects its report.

Alternatibo at buhay

Alternatibo sa file — saklaw ng katalog, hindi isang pangkalakal na pagkakaroon ng istado
Bawat bahagiRelasyonBuhay ng produktoBatayan
— Wala sa file na alternative Kailangan ng datos — Kailangan ng match_type bago ang kahit anong label ng nakaraang tagapagbigay ng impormasyon ay maaaring lumitaw

“Predecessor” at “alternative” labels ay nanggagaling lamang mula sa isang nakatalang pinagmumulan, isang estado ng buhay ng produkto, o ang teksto ng pinanggagalingan. Kung walang napatala ang pagtutugma, walang label ang ipinapakita. Ang aming sariling mga listahan ay hindi isang reperensiya ng merkado.

Ano ang dapat pagsipag-alaran

Panghuhula na maaaring pagtutulig — mga hangganan, salamin at kasalukuyang estado. Ang mga napatunayang panghuhula ay nananatiling nakakitaan.
PahayagLayuninSa pamamagitan ngKalagayan
If a major hyperscaler or accelerator OEM publicly references Saras Micro Devices STILE in a shipping reference design by 2027-09-30, XAIPART expects at least two competing embedded-passive suppliers (existing MLCC or... a major hyperscaler or accelerator OEM publicly references Saras Micro Devices STILE in a shipping reference design by 2027-09-30, XAIPART expects at least two competing embedded-passive suppliers (existing MLCC or advanced-substrate ven... Pending

Ang mga panghuhula na lumabas na mali ay nananatiling nakakitaan at may mark. Hindi namin i tanggalin sila.

Lupa ng kompetisyon

  • 24367 Buhay na mga listahan sa kategoryang ito sa XAIPART
  • 111 ang mga gumagawa na kinakatawan
  • 71 ang mga gumagawa na nabanggit sa aming archive ng balita sa nakaraang 30 araw

Ang bilang ay sumasalamin sa XAIPART catalog lamang — hindi ito market share.

Naapektuhan na bahagi

Wala ng pagtutugma sa catalog Ang balita na ito ay hindi sumangayong anumang bahagi na kasalukuyang nakalista sa XAIPART. Hindi namin inuugnay ang mga pagkakatugon, at hindi namin ipinapakita ang placeholder list.

Panganib ng halaga sa pamamagitan ng sukat

Source: FRED · Generated · reference output z and composite are algorithm outputs, not a fetch snapshot

Cost pressure by dimension — composite stateDiverging bars for three dimensions around a zero midpoint. Input Cost has no reading; Supply Demand z -1.4711, notable; Fx Energy z 0.1243, neutral. Composite index -10.1, band neutral.0Input costno readingSupply/demandz −1.4711 · notable46 dFX & energyz +0.1243 · neutral5 dcomposite −10.1 · neutral−100 · −40 · −15 · 0 · +15 · +40 · +100
Underlying values — copyable for verification.
DimensionFRED series IDUnitLagAs of
Input costPCOPPUSDM, PALUMUSDM, PNICKUSDMUSD/mt52 d
Supply/demandPCU334413334413, IPG3344Sindex(1982=100) / index(2017=100)46 d
FX & energyDEXCHUS, DCOILBRENTEU, DHHNGSPrate / USD/bbl / USD/MMBtu5 d

No free authoritative interface for: gold · silver · rare earth · polysilicon · lithium carbonate · market share — listed rather than approximated.

Kung paano ito ginawa

Proseso ng pagtutunay — hahanapin, pinagmumulan, pagpapatindig ng modelo at gate
Pagsusuri ng trail para sa maikling balita na ito
Source fetched 3D InCites · www.3dincites.com · 17,168 chars · fetch status success
Source sanity (S1) ok — passed before any model call (no s1_ block recorded)
Model / prompt MiniMax-M3 · prompt Blog Agent - News Summary (v2.8-final) · 9,726 tokens · 20.9s · run completed
Gate verdict hold · 5/6 applicable checks passed · spec v2.9 · C10 ratio 0.007647 · C10 rounds 0

Bawat linya sa itaas ay ginawa ng pipeline, hindi naisulat ng kamay.

Score ng redaksyon

Deterministic gate result — pure PHP, walang kabilangang modelo sa hatol
Pisikal na paghahati ng puntos ng Gate 6 mga applicable na pagsusuri 5nakapasa: 83 porsiyento. Hold items: C13 (falsifiable forecast) — sent to human review. Gate spec: v2.9 (S0 + S1 + C1–C20) · Source affinity (C20): 0.7389. Nagpasa ng applicable na pagsusuri 5 / 6 = 83% · pasya: hold Hold items: C13 (falsifiable forecast) — sent to human review Gate spec: v2.9 (S0 + S1 + C1–C20) · Source affinity (C20): 0.7389 Ang gate ang nagpapasya sa pinalabas. Ang pagsusuri ng pagsusuri ng indipendiyente ay advisory lamang.
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Mga Komento

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Pinagmulan

  1. Can Embedded Passives Fix AI's Power Delivery Problem? — https://www.3dincites.com/2026/10/can-embedded-passives-fix-ais-power-delivery-problem/ · rss · nasakop

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