EP1810LI-35 vs EP1810LI-25 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1810LI-35 sa pamamagitan ng Altera at EP1810LI-25 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1810LI-35 | EP1810LI-25 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Manufacturer | Rochester Electronics, LLC (original Altera design) | — |
| Part Family | Altera Classic EPLD | — |
| Device Type | Erasable Programmable Logic Device (EPLD) | EPLD (Erasable Programmable Logic Device), UV-erasable / OTP |
| Macrocells | 48 | 48 |
| Propagation Delay (tPD) | 35 ns | 25 ns |
| Speed Grade | 35 (slowest in EP1810L family) | — |
| Packhaging | 68-pin PLCC (J-Lead, plastic) | 68-pin PLCC (J68, J-Lead) |
| Pin/Package Code | PLCC-68 / PQCC68 | — |
| Technology | CMOS, UV-erasable EPROM configuration cell | — |
| Volte ng Pagbibigay | 5 V (TTL-compatible I/O) | — |
| Temperature na Operasyon | -40 C to +85 C (industrial, 'I' suffix) | — |
| Uri ng Pagpapasok | Surface Mount (PLCC socket compatible) | — |
| JTAG Boundary Scan | IEEE 1149.1 compliant | — |
| Logic Elements | Logic Array Blocks (LABs) connected via Programmable Interconnect Array (PIA) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | unknown |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Level ng MSL | [DATA_NEEDED: MSL rating] | — |
| Family | — | Altera Classic EPLD |
| Usable Gates | — | 900 |
| Maximum Counter Frequency | — | 40 MHz |
| Supply Voltage (VCC) | — | 4.5 V to 5.5 V (nominal 5 V) |
| I/O Pins | — | 48 |
| Dedicated Inputs | — | 12 |
| Global Clock Inputs | — | 4 |
| Interconnect | — | Programmable global and local buses |
| JESD-30 Package Code | — | S-PQCC-J68 |
| Process Technology | — | CMOS |
| Operating Temperature (Industrial 'I' suffix) | — | -40 C to +85 C |
| Programming Mode | — | EPROM/UV-erasable (windowed) and OTP |
| Development Tool | — | Altera MAX+PLUS II |
| Lead-Free Status | — | unknown |