EP1SGX25DF800C5N vs EP1SGX25DF800C6N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP1SGX25DF800C5N sa pamamagitan ng Intel at EP1SGX25DF800C6N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP1SGX25DF800C5N EP1SGX25DF800C6N
Brand Intel Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Family Stratix GX Stratix GX
Device Logic Elements 25,660 (typical) —
Transceiver Channels 8 (full-duplex) —
Maximum Transceiver Data Rate 3.1875 Gbps per channel 3.1875 Gbps
Process Technology 130 nm —
Supply Voltage (Core) 1.5 V typical —
Packhaging FBGA-800 (FineLine BGA, 31x31 mm) FBGA-780 (FineLine BGA, 800-ball per JEDEC ordering code)
Speed Grade C5 (commercial) 6
Temperature na Operasyon 0C to +85C (commercial) Commercial (0 C to +85 C)
Lead-Free / RoHS Status Lead-free (N suffix) —
On-Chip Memory (TriMatrix) Approx. 2 Mbits total —
PLLs Up to 40 (device-wide) —
Embedded 8b/10b Encoder/Decoder Yes (one per transceiver channel) —
PCI Express Hard IP x1, x4 endpoints supported —
DSP Blocks Embedded multiplier blocks (family-wide) Yes, embedded multiplier blocks
Uri ng Pagpapasok Surface Mount (BGA) Surface Mount (BGA)
Level ng MSL [DATA_NEEDED: MSL Level] —
Development Software Quartus II (legacy) —
Logic Elements — 25,560 LEs
Maximum Transceiver Channels — 20 channels
Process Node — [DATA_NEEDED: process node]
Core Voltage — 1.5 V
Configuration Method — Passive Serial / Passive Parallel / Active Serial / JTAG
Transceiver Encoding — 8B/10B
Clock Data Recovery (CDR) — Yes, integrated per channel
Uri ng Memory — TriMatrix embedded SRAM
Tindminan RoHS — [DATA_NEEDED: RoHS status]
Lead Free — [DATA_NEEDED: lead free status]

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