EP1SGX25DF800C5N vs EP1SGX25DF800C6N 比較
詳細並排比較 EP1SGX25DF800C5N 由 Intel 與 EP1SGX25DF800C6N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Intel
EP1SGX25DF800C6N - Stratix GX FPGA, 25K LE, 3.1875 Gbps SERDES | Intel / Altera
EP1SGX25DF800C6N Obsolete規格比較
| 參數 | EP1SGX25DF800C5N | EP1SGX25DF800C6N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | Stratix GX | Stratix GX |
| Device Logic Elements | 25,660 (typical) | — |
| Transceiver Channels | 8 (full-duplex) | — |
| Maximum Transceiver Data Rate | 3.1875 Gbps per channel | 3.1875 Gbps |
| Process Technology | 130 nm | — |
| Supply Voltage (Core) | 1.5 V typical | — |
| 封裝 | FBGA-800 (FineLine BGA, 31x31 mm) | FBGA-780 (FineLine BGA, 800-ball per JEDEC ordering code) |
| Speed Grade | C5 (commercial) | 6 |
| 工作溫度 | 0C to +85C (commercial) | Commercial (0 C to +85 C) |
| Lead-Free / RoHS Status | Lead-free (N suffix) | — |
| On-Chip Memory (TriMatrix) | Approx. 2 Mbits total | — |
| PLLs | Up to 40 (device-wide) | — |
| Embedded 8b/10b Encoder/Decoder | Yes (one per transceiver channel) | — |
| PCI Express Hard IP | x1, x4 endpoints supported | — |
| DSP Blocks | Embedded multiplier blocks (family-wide) | Yes, embedded multiplier blocks |
| 安裝類型 | Surface Mount (BGA) | Surface Mount (BGA) |
| MSL 等級 | [DATA_NEEDED: MSL Level] | — |
| Development Software | Quartus II (legacy) | — |
| Logic Elements | — | 25,560 LEs |
| Maximum Transceiver Channels | — | 20 channels |
| Process Node | — | [DATA_NEEDED: process node] |
| Core Voltage | — | 1.5 V |
| Configuration Method | — | Passive Serial / Passive Parallel / Active Serial / JTAG |
| Transceiver Encoding | — | 8B/10B |
| Clock Data Recovery (CDR) | — | Yes, integrated per channel |
| 記憶體類型 | — | TriMatrix embedded SRAM |
| RoHS 狀態 | — | [DATA_NEEDED: RoHS status] |
| Lead Free | — | [DATA_NEEDED: lead free status] |