EP2A25F672C9ES vs EP2A15F672C9 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2A25F672C9ES sa pamamagitan ng Intel at EP2A15F672C9 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2A25F672C9ES | EP2A15F672C9 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Family | APEX II | — |
| Logic Elements | 24,320 | 16640 |
| System Gates | 900,000 | — |
| Maximum Operating Frequency | 236 MHz | — |
| Propagation Delay | 1.69 ns | 1.94 ns |
| Process Technology | 0.15 µm CMOS (up to 8 metal layers, all-layer copper) | 0.15 µm all-layer copper (up to 8 metal layers) |
| Core Supply Voltage | 1.5 V | 1.5 V |
| User I/Os | 492 | — |
| Packhaging | 672-pin FC-FBGA (FineLine BGA), 27 x 27 mm, 1.0 mm pitch | 672-ball FC-FBGA (27 x 27 mm, 1 mm pitch, FineLine) |
| Speed Grade | -9 | — |
| Configuration Class | ES (Enhanced) | — |
| Temperature na Operasyon | 0 °C to 85 °C (Commercial) | 0 °C to 85 °C (commercial) |
| Uri ng Pagpapasok | Surface Mount | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | — |
| Level ng MSL | [DATA_NEEDED: MSL moisture sensitivity level] | — |
| Logic Family | CMOS | APEX II (CMOS) |
| Usable Gates | — | 600 K |
| Macrocells | — | 1664 |
| Maximum User I/Os | — | 492 |
| I/O Supply Voltage | — | 3.3 V |
| Maximum Internal Frequency | — | 379 MHz |
| High-Speed I/O Support | — | True-LVDS, LVPECL, PCML, HyperTransport up to 1 Gbps |
| Embedded Memory | — | ESB dual-port RAM / FIFO |
| Configuration Interface | — | Passive serial / Active serial / JTAG (IEEE 1149.1) |
| PLLs | — | On-chip PLLs for clock synthesis and deskew |
| Compliance | — | RoHS - [DATA_NEEDED: status not in verified data]; IEEE 1149.1 boundary scan |