EP2A25F672I6 vs EP2A25F672C9 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP2A25F672I6 sa pamamagitan ng Intel at EP2A25F672C9 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP2A25F672I6 EP2A25F672C9
Brand Intel Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle NRND NRND
Family APEX II APEX II
Logic Elements (typical gates) 25,000 —
Fabric Architecture SRAM-based LUT —
Process Technology 0.18 µm CMOS 0.15 µm all-layer copper, up to 8 metal layers
Packhaging 672-ball FineLine BGA (FBGA-672) 672-ball FCBGA (FineLine BGA)
Core Voltage 1.5 V —
Configuration Method External SRAM configuration device (EPC series) —
Temperature Grade Industrial (-40 °C to +100 °C ambient) —
Speed Grade 6 —
Embedded Memory Embedded System Blocks (ESB), dual-port RAM / CAM ESBs for dual-port RAM, ROM, FIFO
DSP Blocks MultiCore dedicated multipliers —
Boundary Scan JTAG (IEEE 1149.1) compliant —
Clock Management Dedicated PLL / clock tree circuitry —
I/O Bank Count [DATA_NEEDED: number of user I/O banks] —
Tindminan RoHS [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED]
Lead-Free [DATA_NEEDED: lead-free status] —
Level ng MSL [DATA_NEEDED: moisture sensitivity level] —
Uri ng Pagpapasok Surface Mount (BGA) Surface Mount
Logic Elements (LE) — Approximately 25,000
Macro Cells — 2432
User I/O — 492
Package Dimensions — 27 mm x 27 mm
Ball Pitch — 1.0 mm
Logic Family — CMOS
Propagation Delay — 1.69 ns
Temperature na Operasyon — 0°C to 85°C (Commercial)
Volte ng Pagbibigay — [DATA_NEEDED: core VCC voltage]
I/O Standards — LVTTL, LVCMOS, PCI, LVDS, HSTL, SSTL (multi-voltage 1.5/1.8/2.5/3.3 V)
Configuration — Passive Serial, Passive Parallel Synchronous, JTAG

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