EP3SE260H780I4L vs EP3SE260H780C4N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3SE260H780I4L sa pamamagitan ng Intel at EP3SE260H780C4N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP3SE260H780I4L - Stratix III E FPGA, 255K Logic Elements | Intel
EP3SE260H780I4L ⚠ Huling Pagbili
Pagsanggunian na paghahambing
| Parametro | EP3SE260H780I4L | EP3SE260H780C4N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | NRND |
| Family | Stratix III E (Enhanced) | Stratix III E (Enhanced) |
| Logic Elements | 255,000 | 255,000 |
| Total Memory Bits | 16,672,640 | — |
| Number of LABs/CLBs | [DATA_NEEDED: LAB count] | — |
| User I/O Count | 488 | — |
| Core Voltage | 0.9 V | 0.86 V to 1.15 V |
| Process Technology | 65 nm | — |
| Package Type | 780-pin FC-HFBGA (flip-chip BGA) | — |
| Uri ng Pagpapasok | Surface Mount (flip-chip) | Surface Mount |
| Number of Transceivers | 24 (family-level maximum, per-pin count depends on variant) | — |
| Max Transceiver Data Rate | 6.375 Gbps (Stratix III E family spec) | — |
| Number of 18x18 Multipliers | [DATA_NEEDED: per-package multiplier count] | — |
| Temperature na Operasyon | Industrial, -40C to +85C | 0C to +85C (commercial) |
| Tindminan RoHS | Compliant (lead-free) | — |
| Configuration Mode | JTAG (IEEE 1149.1), Passive Serial, Fast Passive Parallel | — |
| Pin/Package | 780-BBGA, FCBGA (flip-chip) | — |
| Logic Array Blocks (LABs) | — | 10,200 |
| Total RAM Bits | — | 16,672,768 |
| Embedded Memory | — | M9K and M144K blocks |
| User I/O Pins | — | 488 |
| DSP Blocks (18x18 Multipliers) | — | 768 |
| PLLs | — | 12 |
| Process Node | — | 65 nm CMOS |
| Maximum Core Clock Frequency | — | 450 MHz |
| Packhaging | — | 780-ball FCBGA (Flip Chip BGA) |
| Level ng Sensitivity sa Asid ng Moisture (MSL) | — | 3 (168 hours) |
| Configuration Method | — | Serial/Parallel via Quartus II |