EP3SL200H780I3 vs EP3SL200H780C3N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP3SL200H780I3 sa pamamagitan ng Intel at EP3SL200H780C3N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP3SL200H780I3 EP3SL200H780C3N
Brand Intel Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle NRND NRND
Series Stratix III L —
Family Stratix III Stratix III L (low-power)
Logic Elements 200,000 200,000
LABs (Logic Array Blocks) 8000 —
Total RAM Bits 10,901,504 (10,900 Kb) —
User I/O Count 488 —
Number of I/O Banks [DATA_NEEDED: I/O banks] —
Embedded Multipliers (DSP blocks) 384 (18x18) —
PLLs 12 12 (Stratix III PLL array)
Process Technology 65 nm CMOS —
Core Voltage 1.1 V —
Maximum Operating Frequency 717 MHz —
Temperature na Operasyon -40C to +100C (Industrial) 0C to +85C (commercial)
Packhaging 780-BBGA, FCBGA (HBGA-780) 780-Ball FCBGA (HBGA), 29 x 29 mm
Uri ng Pagpapasok Surface Mount Surface Mount
Supplier Device Package 780-FBGA (29x29 mm) —
Lead-Free / RoHS Compliant (lead-free) Yes
Process Node — 40 nm
Embedded Memory Bits — 10,901,504 bits
Logic Array Blocks (LABs) — 8,000
User I/Os — 488
Maximum Internal Clock Frequency — 800 MHz
Transceivers — 24 channels, up to 3.75 Gbps
DSP Blocks — 384
Speed Grade — C3 (commercial, -3 speed)
Voltage - Core — 0.9 V / 1.0 V (core, VCC)
Voltage - I/O — 1.2 V to 3.3 V (VCCIO banks)
Level ng MSL — 3
Mounting Pitch — 1.0 mm ball pitch
Configuration — JTAG IEEE Std 1149.1, passive/active serial

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