EPM3064ATI44-10NAD vs EPM3064ATC44-10N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3064ATI44-10NAD sa pamamagitan ng Altera at EPM3064ATC44-10N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM3064ATI44-10NAD - MAX 3000A 64-Macrocell CPLD 44-TQFP | Altera
EPM3064ATI44-10NAD ObsoletePagsanggunian na paghahambing
| Parametro | EPM3064ATI44-10NAD | EPM3064ATC44-10N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Aktibo |
| Family | MAX 3000A | MAX 3000A |
| Macrocells | 64 | — |
| Usable Gates | 1,250 | 1250 |
| Logic Array Blocks (LABs) | 4 (16 macrocells each) | 4 |
| User I/Os (max) | 34 | — |
| Pin-to-Pin Delay (tPD) | 10 ns | 10 ns |
| Setup Time (tSU) | 4.5 ns | — |
| Core Voltage (VCCINT) | 3.3 V | — |
| I/O Voltage (VCCIO) | 3.3 V or 2.5 V | — |
| Packhaging | TQFP-44 | TQFP-44 (10x10 mm) |
| Temperature na Operasyon | -40C to +85C (Industrial) | 0C to +70C (commercial) |
| Programming Interface | JTAG (IEEE Std. 1532 compliant) | — |
| In-System Programmable | Yes | — |
| Tindminan RoHS | Compliant | Compliant |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macro Cells | — | 64 |
| User I/O Pins | — | 34 |
| Maximum Counter Frequency | — | 192.3 MHz |
| Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Standard | — | MultiVolt (mixed 1.5 V / 1.8 V / 2.5 V / 3.3 V) |
| Configuration Memory | — | EEPROM (non-volatile) |
| In-System Programming | — | IEEE Std. 1532 compliant |
| Boundary-Scan Test | — | IEEE Std. 1149.1 (JTAG) compliant |
| Pin-Locking | — | Yes (across design iterations) |