EPM5032DM883B vs EPM5032DC Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5032DM883B sa pamamagitan ng Altera at EPM5032DC sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5032DM883B | EPM5032DC |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 5000 (Classic EPLD) | MAX 5000 |
| Macrocells | 32 | 32 |
| Logic Elements | 32 macrocells (MAX architecture) | — |
| Technology | UV-erasable EPROM cell | Bipolar EPROM, UV-erasable |
| Propagation Delay (tPD) | [DATA_NEEDED: tPD in ns] | — |
| Maximum Counter Frequency (fCNT) | [DATA_NEEDED: fCNT in MHz] | — |
| Supply Voltage (VCC) | 5 V (nominal, TTL-compatible I/O) | — |
| Temperature na Operasyon | MILITARY (per /883B screen) | 0C to +70C |
| MIL-STD-883 Screening | Class B (DM/883B) | — |
| Package Type | WDIP-28 (ceramic DIP with quartz window) | — |
| Bilang ng Pin | 28 | 24 |
| Uri ng Pagpapasok | Through-Hole | Through-hole (DIP) |
| Terminal Form | Through-Hole | — |
| Package Shape | RECTANGULAR | — |
| Programming Method | Programmer + UV erase | — |
| Tindminan RoHS | [DATA_NEEDED: lead-bearing ceramic; likely non-compliant] | [DATA_NEEDED: RoHS status] |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Logic Array Blocks (LABs) | — | 1 |
| Packhaging | — | DIP-24 (ceramic, windowed) |
| Speed Grade | — | DC (commercial) |
| Programmable Logic Elements | — | AND array + fixed OR array per macrocell |
| Configuration Memory | — | EPROM (UV-erasable via package window) |
| Programming Tool | — | Altera MAX+PLUS II / A+PLUS legacy |
| Katayuan ng Lifecycle | — | Obsolete (mature legacy) |