EPM5128JI vs EPM5128JC Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5128JI sa pamamagitan ng Intel at EPM5128JC sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5128JI | EPM5128JC |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Device Family | MAX 5000 | — |
| Device Type | UV-erasable programmable logic device (PLD) | EPLD / CPLD |
| Macrocells | 128 | — |
| Propagation Delay (tPD) | 55 ns (typical) | 35 ns |
| Maximum Internal Frequency | 40 MHz | — |
| Process Technology | CMOS | CMOS EPROM |
| Programmable Technology | UV-erasable EPROM cell | — |
| Packhaging | 68-terminal ceramic CQCC, windowed, J-leads | — |
| Operating Temperature Grade | Industrial ("I" suffix) | — |
| Programming | Altera MAX+plus II compatible programmer + UV eraser | — |
| Tindminan RoHS | Non-compliant (ceramic hermetic package) | [DATA_NEEDED: RoHS status - legacy part] |
| Lead Finish | Tin-lead (SnPb) over nickel | — |
| Uri ng Pagpapasok | Surface Mount (J-lead CQCC) | Surface Mount (PLCC socket or solder) |
| Logic Blocks | [DATA_NEEDED: number of LABs / logic array blocks] | — |
| User I/O Pins | [DATA_NEEDED: pin count of user I/Os] | [DATA_NEEDED: user I/O pin count] |
| Volte ng Pagbibigay | [DATA_NEEDED: VCC range] | — |
| Standby Current | [DATA_NEEDED: ICCSB] | — |
| Product Family | — | MAX 5000 |
| Macrocell Count | — | 128 |
| Logic Elements | — | Programmable AND/OR/XOR array |
| Supply Voltage (VCC) | — | 5 V (typical) |
| Bilang ng Pins | — | 68 |
| Package Type | — | PLCC-68 (JLCC) ceramic, J-leaded |
| Dedicated Inputs | — | 8 |
| Configuration Memory | — | UV-erasable EPROM (windowed package) |
| Programming Interface | — | Altera MAX+PLUS II / A+PLUS / legacy programmer |
| Temperature na Operasyon | — | Commercial 0C to +70C |
| Boundary Scan | — | JTAG IEEE 1149.1 (family feature) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |