EPM5192IC-1 vs EPM5192LI-1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192IC-1 sa pamamagitan ng Altera at EPM5192LI-1 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5192IC-1 | EPM5192LI-1 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | MAX 5000 EPLD | MAX 5000 |
| Macrocells | 192 | 192 |
| Usable Gates | 3750 | 3,750 |
| Dedicated Inputs | 7 | — |
| I/O Pins | 64 | — |
| Pin-to-Pin Delay (tPD) | 15 ns (max, -1 speed grade) | — |
| Counter Frequency (fCNT) | 76.9 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (nominal 5 V) | — |
| Temperature na Operasyon | -40C to +85C (industrial) | [DATA_NEEDED: industrial vs military range] |
| Technology | CMOS, UV-erasable, in-system programmable | — |
| Packhaging | 68-pin ceramic J-lead (IC-1 suffix) | — |
| Programming Interface | JTAG / IEEE Std 1149.1 boundary scan | — |
| Security Bit | Yes (design protection) | — |
| Supply Current (Icc, typical) | [DATA_NEEDED: Icc] mA | — |
| Output Drive Current (IOH/IOL) | [DATA_NEEDED: IOH/IOL] mA | — |
| Device Type | — | EPLD (UV-Erasable/OTP Complex PLD) |
| Maximum Toggle Frequency | — | 40 MHz |
| Volte ng Pagbibigay | — | 5 V |
| Propagation Delay (tPD) | — | [DATA_NEEDED: tPD in ns at -1 grade] |
| User I/O Pins | — | [DATA_NEEDED: user I/O count for JLCC variant] |
| Package Type | — | JLCC (windowed, ceramic, UV-erasable) |
| Process Technology | — | CMOS EPROM, UV-erasable |
| Speed Grade | — | -1 |
| Bilang ng Pin | — | [DATA_NEEDED: pin count of LI package] |
| Uri ng Pagpapasok | — | Surface Mount (JLCC with J-leads) |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |
| Tindminan RoHS | — | [DATA_NEEDED: RoHS status of ceramic LI variant] |
| Lead Free | — | [DATA_NEEDED: lead-free] |
| Programmable Interconnect | — | Programmable Interconnect Array (PIA) |
| Architecture | — | EEPROM/EPROM-based, non-volatile, instant-on |