EPM9560GI280-15 vs EPM9560GC280-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560GI280-15 sa pamamagitan ng Intel at EPM9560GC280-15 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM9560GC280-15 - MAX 9000 CPLD, 560 Macro Cells, 15ns CPGA280 | Intel / Altera
EPM9560GC280-15 ObsoletePagsanggunian na paghahambing
| Parametro | EPM9560GI280-15 | EPM9560GC280-15 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Device Family | MAX 9000 | — |
| Architecture | CMOS EEPROM, third-generation Multiple Array MatriX (MAX) | Multiple Array MatriX (MAX) |
| Macrocells | 560 | — |
| Flip-Flops | 772 | — |
| User I/Os | 216 | — |
| Dedicated Inputs | 12 | — |
| Logic Elements / Gates | 12,000 usable gates | — |
| Internal Frequency (fMAX) | 145 MHz | — |
| Propagation Delay (tPD) | 11.4 ns | — |
| Clock-to-Output (tCO) | 16.6 ns | — |
| Supply Voltage (VCCINT/VCCIO) | 4.5 V to 5.5 V (3.3 V or 5 V I/O) | 5.0 V |
| In-System Programmability | 5.0-V ISP via JTAG | — |
| Packhaging | 280-pin PGA (ceramic, metal-sealed cofired) | — |
| Temperature na Operasyon | -40 °C to 85 °C (industrial) | — |
| Process Technology | CMOS EEPROM | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Non-compliant (ceramic CPGA, contains lead) |
| Level ng Sensitivity sa Asid ng Moisture (MSL) | MSL-3 (168 hours) | — |
| Family | — | MAX 9000 |
| Device Type | — | EE PLD (CMOS EEPROM-based CPLD) |
| Macro Cells | — | 560 |
| Typical Gates | — | 12,000 |
| Maximum Operating Frequency | — | 117.6 MHz |
| Propagation Delay (tpd) | — | 15 ns (speed grade -15) |
| Propagation Delay (alternate datasheet figure) | — | 16.6 ns |
| Operating Temperature (Commercial) | — | 0C to +70C |
| Package Type | — | CPGA-280 (Ceramic Pin Grid Array, 280 pins) |
| Uri ng Pagpapasok | — | Through-Hole |
| Programmability | — | In-System Programmable (ISP) via JTAG IEEE 1149.1 |
| Technology | — | CMOS EEPROM, 0.5 um process (MAX third-gen) |
| Katayuan ng Lifecycle | — | Obsolete (legacy Altera MAX 9000 family) |