EPM9560RC240-3 vs EPM9560RC240-2 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RC240-3 sa pamamagitan ng Altera at EPM9560RC240-2 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9560RC240-3 | EPM9560RC240-2 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Device Type | Complex Programmable Logic Device (CPLD) | — |
| Family | MAX 9000 | MAX 9000 |
| Macrocells | 560 | — |
| Usable Gates | 12000 | 12,000 |
| Logic Array Blocks (LABs) | 20 | — |
| Pin-to-Pin Propagation Delay | 3 ns (speed grade -3) | — |
| Maximum Operating Frequency | [DATA_NEEDED: fMAX] | — |
| Supply Voltage (VCCINT) | 5 V | — |
| Supply Voltage (VCCIO) | 5 V | — |
| User I/O Pins | 192 | — |
| Packhaging | 240-pin RQFP (PowerQuad II) | 240-pin RQFP (Metric QFP) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Configuration Memory | EEPROM (non-volatile) | — |
| Hanay ng Temperature na Operasyon | 0C to +70C (commercial) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS] | Non-compliant (5V RQFP, pre-RoHS era) |
| Lead Finish | [DATA_NEEDED: lead finish] | — |
| Level ng MSL | [DATA_NEEDED: MSL] | — |
| JTAG Support | [DATA_NEEDED: JTAG] | — |
| Logic Elements | — | 560 macrocells |
| Pin-to-Pin Delay | — | 2 ns (speed grade -2) |
| Maximum Frequency | — | 100 MHz |
| Volte ng Pagbibigay | — | 5 V |
| User I/O Count | — | 212 |
| Programming Interface | — | JTAG (IEEE 1149.1), in-system programmable |
| Non-Volatile Configuration | — | Yes (EEPROM-based) |
| Temperature na Operasyon | — | [DATA_NEEDED: commercial/industrial grade] |
| Lead-Free | — | No (legacy Sn/Pb process) |
| Logic Block Count | — | [DATA_NEEDED: LAB count] |