EPM9560RC240-3 vs EPM9560RC240-2 比較
詳細並排比較 EPM9560RC240-3 由 Altera 與 EPM9560RC240-2 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM9560RC240-3 | EPM9560RC240-2 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Device Type | Complex Programmable Logic Device (CPLD) | — |
| Family | MAX 9000 | MAX 9000 |
| Macrocells | 560 | — |
| Usable Gates | 12000 | 12,000 |
| Logic Array Blocks (LABs) | 20 | — |
| Pin-to-Pin Propagation Delay | 3 ns (speed grade -3) | — |
| Maximum Operating Frequency | [DATA_NEEDED: fMAX] | — |
| Supply Voltage (VCCINT) | 5 V | — |
| Supply Voltage (VCCIO) | 5 V | — |
| User I/O Pins | 192 | — |
| 封裝 | 240-pin RQFP (PowerQuad II) | 240-pin RQFP (Metric QFP) |
| 安裝類型 | Surface Mount | Surface Mount |
| Configuration Memory | EEPROM (non-volatile) | — |
| 工作溫度範圍 | 0C to +70C (commercial) | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS] | Non-compliant (5V RQFP, pre-RoHS era) |
| Lead Finish | [DATA_NEEDED: lead finish] | — |
| MSL 等級 | [DATA_NEEDED: MSL] | — |
| JTAG Support | [DATA_NEEDED: JTAG] | — |
| Logic Elements | — | 560 macrocells |
| Pin-to-Pin Delay | — | 2 ns (speed grade -2) |
| Maximum Frequency | — | 100 MHz |
| 供應電壓 | — | 5 V |
| User I/O Count | — | 212 |
| Programming Interface | — | JTAG (IEEE 1149.1), in-system programmable |
| Non-Volatile Configuration | — | Yes (EEPROM-based) |
| 工作溫度 | — | [DATA_NEEDED: commercial/industrial grade] |
| Lead-Free | — | No (legacy Sn/Pb process) |
| Logic Block Count | — | [DATA_NEEDED: LAB count] |