EPM9560RC240-3 vs EPM9560RC240-2 Comparison
Detailed side-by-side comparison of EPM9560RC240-3 by Altera and EPM9560RC240-2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560RC240-3 | EPM9560RC240-2 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Device Type | Complex Programmable Logic Device (CPLD) | — |
| Family | MAX 9000 | MAX 9000 |
| Macrocells | 560 | — |
| Usable Gates | 12000 | 12,000 |
| Logic Array Blocks (LABs) | 20 | — |
| Pin-to-Pin Propagation Delay | 3 ns (speed grade -3) | — |
| Maximum Operating Frequency | [DATA_NEEDED: fMAX] | — |
| Supply Voltage (VCCINT) | 5 V | — |
| Supply Voltage (VCCIO) | 5 V | — |
| User I/O Pins | 192 | — |
| Package | 240-pin RQFP (PowerQuad II) | 240-pin RQFP (Metric QFP) |
| Mounting Type | Surface Mount | Surface Mount |
| Configuration Memory | EEPROM (non-volatile) | — |
| Operating Temperature Range | 0C to +70C (commercial) | — |
| RoHS Status | [DATA_NEEDED: RoHS] | Non-compliant (5V RQFP, pre-RoHS era) |
| Lead Finish | [DATA_NEEDED: lead finish] | — |
| MSL Level | [DATA_NEEDED: MSL] | — |
| JTAG Support | [DATA_NEEDED: JTAG] | — |
| Logic Elements | — | 560 macrocells |
| Pin-to-Pin Delay | — | 2 ns (speed grade -2) |
| Maximum Frequency | — | 100 MHz |
| Supply Voltage | — | 5 V |
| User I/O Count | — | 212 |
| Programming Interface | — | JTAG (IEEE 1149.1), in-system programmable |
| Non-Volatile Configuration | — | Yes (EEPROM-based) |
| Operating Temperature | — | [DATA_NEEDED: commercial/industrial grade] |
| Lead-Free | — | No (legacy Sn/Pb process) |
| Logic Block Count | — | [DATA_NEEDED: LAB count] |