EPM9560WC208 vs EPM9560ARC208-10 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560WC208 sa pamamagitan ng Altera at EPM9560ARC208-10 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM9560WC208 EPM9560ARC208-10
Brand Altera Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle NRND Obsolete
Family MAX 9000 —
Device Type EE Programmable Logic Device (CPLD) —
Macrocells 560 560 macrocells
Logic Array Blocks (LABs) 35 —
Flip-Flops 772 —
Maximum User I/O 149 —
Maksimum na Taktiko ng Oras 117.6 MHz —
Propagation Delay (tpd, -15 grade) 16.6 ns —
Volte ng Pagbibigay 3.3 V or 5 V 5.0 V
Process Technology CMOS, electrically erasable —
Packhaging 208-pin CQFP (Ceramic Quad Flat Pack) 208-pin RQFP (PowerQuad Flat Pack) with exposed pad
Terminal Pitch 0.50 mm —
Uri ng Pagpapasok Surface Mount Surface Mount
Programming Interface IEEE 1149.1 JTAG —
Configuration Memory Non-volatile EE (instant-on) —
Hot Socketing Support Yes —
Level ng MSL [DATA_NEEDED: MSL level] —
Tindminan RoHS [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS status]
Device Family — MAX 9000A (Multiple Array MatriX)
Programmable Logic Type — CPLD (Complex Programmable Logic Device)
Usable Gates — 12,000 gates
Logic Array Blocks — 35 LABs
User I/O Pins — 153 I/O
Propagation Delay (tPD) — 10 ns (speed grade -10)
Internal Frequency — 144.9 MHz
Logic Family — CMOS
Configuration Technology — EEPROM (non-volatile, in-system programmable)
JTAG Interface — IEEE 1149.1 boundary-scan (ISP)
Temperature na Operasyon — 0 C to +70 C (commercial)
Bilang ng Pin — 208 pins

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