EPM9560WC208 vs EPM9560ARC208-10 对比

详细并排对比 EPM9560WC208 出自 Altera 和 EPM9560ARC208-10 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9560WC208 EPM9560ARC208-10
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $125.00 $0.00
Family MAX 9000 —
Device Type EE Programmable Logic Device (CPLD) —
Macrocells 560 560 macrocells
Logic Array Blocks (LABs) 35 —
Flip-Flops 772 —
Maximum User I/O 149 —
最大时钟频率 117.6 MHz —
Propagation Delay (tpd, -15 grade) 16.6 ns —
电源电压 3.3 V or 5 V 5.0 V
Process Technology CMOS, electrically erasable —
封装 208-pin CQFP (Ceramic Quad Flat Pack) 208-pin RQFP (PowerQuad Flat Pack) with exposed pad
Terminal Pitch 0.50 mm —
安装类型 Surface Mount Surface Mount
Programming Interface IEEE 1149.1 JTAG —
Configuration Memory Non-volatile EE (instant-on) —
Hot Socketing Support Yes —
MSL 等级 [DATA_NEEDED: MSL level] —
RoHS 状态 [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS status]
Device Family — MAX 9000A (Multiple Array MatriX)
Programmable Logic Type — CPLD (Complex Programmable Logic Device)
Usable Gates — 12,000 gates
Logic Array Blocks — 35 LABs
User I/O Pins — 153 I/O
Propagation Delay (tPD) — 10 ns (speed grade -10)
Internal Frequency — 144.9 MHz
Logic Family — CMOS
Configuration Technology — EEPROM (non-volatile, in-system programmable)
JTAG Interface — IEEE 1149.1 boundary-scan (ISP)
工作温度 — 0 C to +70 C (commercial)
引脚数量 — 208 pins

数据手册与资源

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