LC4064B-5T48I vs LC4064B-5T48C Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng LC4064B-5T48I sa pamamagitan ng Lattice Semiconductor at LC4064B-5T48C sa pamamagitan ng Lattice Semiconductor. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | LC4064B-5T48I | LC4064B-5T48C |
|---|---|---|
| Brand | Lattice Semiconductor | Lattice Semiconductor |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Product Type | SuperFAST high-density programmable logic device (CPLD) | — |
| Device Series | ispMACH 4000B | — |
| Number of Macrocells | 64 macrocells | — |
| Number of I/O | 32 I/O | — |
| Speed Grade | 5 ns | — |
| Programming Type | In-system programmable (ISP) | — |
| Supported Supply Voltages | 1.8 V, 2.5 V, and 3.3 V | 3.3 V, 2.5 V, and 1.8 V |
| Packhaging | 48-LQFP (TQFP-48) | — |
| Uri ng Pagpapasok | Surface mount | Surface mount |
| Hanay ng Temperature na Operasyon | -40 °C to +105 °C (junction temperature) | [DATA_NEEDED: operating temperature range] |
| Logic Family | ispMACH 4000B SuperFAST high-density PLD | SuperFAST high-density PLD family |
| Maksimum na Taktiko ng Oras | [DATA_NEEDED: maximum clock frequency] | — |
| Kuru-kuryente ng Pagbibigay | [DATA_NEEDED: supply current] | — |
| Output Drive Current | [DATA_NEEDED: output drive current] | — |
| Temperature na Operasyon | [DATA_NEEDED: operating ambient temperature range] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| REACH Status | [DATA_NEEDED: REACH status] | [DATA_NEEDED: REACH status] |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification] | [DATA_NEEDED: AEC-Q100 qualification status] |
| Lead-Free Status | [DATA_NEEDED: lead-free status] | — |
| Device Type | — | In-System Programmable SuperFAST High-Density PLD |
| Macrocell Count | — | 64 macrocells |
| Maximum Operating Frequency | — | 400 MHz |
| Propagation Delay | — | 2.5 ns |
| Configuration Method | — | In-system programmable |
| Global Clock Pins | — | Up to 4 pins |
| Clock Polarity Control | — | Programmable |
| Product-Term Outputs per Macrocell | — | Up to 80 PTs per output |
| Package Type | — | 48-pin TQFP |
| Bilang ng Pin | — | 48 pins |
| Programmable Logic Type | — | Complex programmable logic device (CPLD) |
| I/O Pin Count | — | [DATA_NEEDED: I/O pin count] |
| Configuration Memory | — | [DATA_NEEDED: configuration memory details] |