RTAX2000S-1CG624PROTO vs RTAX2000SL-1CGS624V Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng RTAX2000S-1CG624PROTO sa pamamagitan ng Microchip Technology at RTAX2000SL-1CGS624V sa pamamagitan ng Microsemi. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Microchip Technology
RTAX2000S-1CG624PROTO - 2M-Gate Rad-Tolerant FPGA | Microchip
RTAX2000S-1CG624PROTO ✓ NakahandaMicrosemi
RTAX2000SL-1CGS624V - 2M-Gate Rad-Tolerant FPGA | Actel/Microchip
RTAX2000SL-1CGS624V ✓ NakahandaPagsanggunian na paghahambing
| Parametro | RTAX2000S-1CG624PROTO | RTAX2000SL-1CGS624V |
|---|---|---|
| Brand | Microchip Technology | Microsemi |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Equivalent System Gates | 2000000 | 2000000 |
| Logic Cells | 32256 | — |
| Configurable Logic Blocks (CLBs) | 21504 | — |
| Embedded Memory | 540 kbits (family max, with optional EDAC) | Up to 540 kbits with optional EDAC |
| User I/Os (family max) | 684 | — |
| Total Ionizing Dose (functional) | 300 krad (Si) | — |
| Total Ionizing Dose (parametric) | 200 krad (Si) | — |
| SEU Rate | Less than 1E-10 errors per bit-day | Less than 1E-10 errors per bit-day |
| Maximum System Frequency | 350 MHz (family performance) | — |
| Technology | CMOS antifuse (one-time programmable) | Digital CMOS, antifuse nonvolatile |
| Speed Grade | -1 | -1 |
| Packhaging | CCGA-624 (CG624 ceramic column grid array) | 624-ball ceramic CGA (CGS624) |
| Configuration | Live at power-up (nonvolatile antifuse) | One-time programmable (OTP), live at power-up, single chip |
| Qualification Flow | PROTO (engineering prototype) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Family | RTAX-S/SL Radiation-Tolerant FPGA | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | — |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Logic Cells (CLBs) | — | 21504 |
| User I/Os (max, package dependent) | — | Up to 684 |
| Total Ionizing Dose (TID) | — | 300 krad (functional), 200 krad (parametric) |
| Quality / Screening Suffix | — | S (space flow), V suffix qualification level |
| Core Supply Voltage | — | [DATA_NEEDED: core supply voltage] |
| I/O Supply Voltage | — | [DATA_NEEDED: I/O supply voltage] |
| Embedded SRAM Features | — | Built-in FIFO control logic |
| Clocking | — | Segmentable clocks, chip-wide highway routing |