RTAX250S-1LG624V vs RTAX250S-CG624E Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng RTAX250S-1LG624V sa pamamagitan ng Microchip Technology at RTAX250S-CG624E sa pamamagitan ng Microchip Technology. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Microchip Technology
RTAX250S-1LG624V RTAX250S-1LG624V - 250K-Gate Rad-Tolerant FPGA 1.5V | Microchip

RTAX250S-1LG624V - 250K-Gate Rad-Tolerant FPGA 1.5V | Microchip

RTAX250S-1LG624V ✓ Nakahanda
Microchip Technology
RTAX250S-CG624E RTAX250S-CG624E - 250K-Gate Rad-Tolerant FPGA | Microchip

RTAX250S-CG624E - 250K-Gate Rad-Tolerant FPGA | Microchip

RTAX250S-CG624E ✓ Nakahanda

Pagsanggunian na paghahambing

Parametro RTAX250S-1LG624V RTAX250S-CG624E
Brand Microchip Technology Microchip Technology
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Aktibo Aktibo
Family RTAX-S Radiation-Tolerant FPGA RTAX-S radiation-tolerant FPGA
Equivalent Gate Count 250000 gates —
Configurable Logic Blocks (CLBs) 2816 —
Logic Cells 4224 —
I/Os 248 —
Core Supply Voltage 1.5 V nominal 1.5 V
Speed Grade -1 —
Packhaging CGA624 (LG624), 624-column ceramic column grid array —
Package Suffix V (leaded column finish) —
Temperature na Operasyon -55C to +125C -55C to +125C
Technology CMOS, antifuse programmable —
Radiation Tolerance Radiation-tolerant (RTAX-S family, SEU-tolerant) [DATA_NEEDED: TID and SEU LET figures] —
Configuration Live at power-up, single chip, no boot PROM —
Uri ng Pagpapasok Surface Mount Surface Mount
Level ng MSL [DATA_NEEDED: MSL level] —
Tindminan RoHS [DATA_NEEDED: RoHS status - ceramic space-grade package typically exempt] —
Katayuan ng Lifecycle Active —
System Gates — 250000 gates
Logic Cells (CLBs) — 2816
Maximum Toggle Frequency — 649 MHz
Process Technology — 0.15 um CMOS
Logic Family — CMOS
CLB Combinatorial Delay (max) — 0.930 ns
Package Type — CCGA-624 (ceramic column grid array, 624 pins)
Programming Technology — Antifuse (one-time programmable)
SEU Hardening — SEU-hardened registers, no external TMR required
SEU Immunity — Immune to single-event upsets to specified LET threshold; SEU rate < 10-10 errors/bit-day
Power-Up Behavior — Live at power-up (true single-chip)
Target Application — Space-flight systems

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