10AS032H2F34E2LG vs 10AS032H3F34E2LG 比較
詳細並排比較 10AS032H2F34E2LG 由 Intel 與 10AS032H3F34E2LG 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | 10AS032H2F34E2LG | 10AS032H3F34E2LG |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Family | Arria 10 SX | Arria 10 SX SoC FPGA |
| Device Tier | 10AS032 (mid-density) | — |
| Configuration | SoC FPGA (HPS + FPGA fabric) | — |
| Logic Elements | 320,000 | 320,000 |
| Processor Subsystem | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| Maximum Operating Frequency | 1.5 GHz | — |
| 封裝 | 1152-ball FC-FBGA (F34), 35 x 35 mm | — |
| Speed Grade | 2 | H3 |
| Temperature Grade | E2 (commercial/extended) | E2 (Industrial) |
| On-chip Memory (M20K blocks) | Approx. 21 Mb [DATA_NEEDED: exact Mb from datasheet] | — |
| DSP Blocks | Variable-precision, IEEE 754 single-precision FP support | [DATA_NEEDED: DSP block count] |
| Transceivers | Up to 14.1 Gbps [DATA_NEEDED: exact count for F34 package] | [DATA_NEEDED: transceiver count and rate] |
| Memory Controller Hard IP | DDR4, DDR3, QDRII+, RLDRAM3 | — |
| Process Node | 20 nm | 20 nm |
| 安裝類型 | Surface Mount (BGA) | Surface Mount (Flip-Chip BGA) |
| RoHS 狀態 | Compliant | Compliant (lead-free) |
| Form of Terminal | Ball (BGA) | — |
| Terminal Pitch | 1 mm | — |
| Hard Processor System | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| Processor Clock | — | Up to 1.5 GHz |
| Package Code | — | F34 (FCBGA) |
| Pin/Ball Count | — | 1152 |
| Package Size | — | 35 x 35 mm |
| Memory Interface | — | DDR3 / DDR4 with hard controllers |
| 生命週期狀態 | — | Active |