CDK8307AILP64 vs CDK8307CILP64 比較

詳細並排比較 CDK8307AILP64 由 MaxLinear 與 CDK8307CILP64 由 MaxLinear. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 CDK8307AILP64 CDK8307CILP64
品牌 MaxLinear MaxLinear
類別 ADC/DAC ADC/DAC
生命週期狀態 啟用中 啟用中
解析度 12/13-bit (selectable) 12/13-bit (selectable)
Number of Channels 8 (simultaneous sampling) 8 (simultaneous sampling)
Sample Rate Range 20 / 40 / 50 / 65 / 80 MSPS —
Architecture Pipelined ADC with proprietary core Proprietary pipeline ADC
Output Interface Serial LVDS —
Reference Internal reference (integrated) Internal (integrated bandgap)
供應電壓 [DATA_NEEDED: supply voltage] —
Power Dissipation (Typ) Ultra-low power (per-channel shutdown) —
Shutdown Modes Per-channel + full-chip idle (via external pin) —
Control Interface Serial programming interface (SPI-style) SPI-compatible serial
FPGA Compatibility Designed to interface with major FPGA vendors —
封裝 64-pin QFN (ILP64) 64-pin LQFP (LP64)
安裝類型 Surface Mount Surface Mount
工作溫度範圍 [DATA_NEEDED: temperature range] [DATA_NEEDED: operating temperature range]
RoHS 狀態 Compliant Compliant (per MaxLinear product page)
Original Brand Cadeka / Exar (now MaxLinear) —
Sample Rate — 65 MSPS maximum (20/40/50/65 MSPS grades)
Digital Output Interface — Serial LVDS
Input Type — Differential analog inputs
Power Profile — Ultra-low power (per-channel)
Supply Voltage (AVDD) — [DATA_NEEDED: AVDD nominal]
Supply Voltage (DRVDD/LVDS) — [DATA_NEEDED: DRVDD nominal]
ENOB — [DATA_NEEDED: effective number of bits]
SNR — [DATA_NEEDED: signal-to-noise ratio]
SFDR — [DATA_NEEDED: spurious-free dynamic range]

資料表與資源

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