EP1SGX25DF800C6N vs EP1SGX25DF800C5N 比較

詳細並排比較 EP1SGX25DF800C6N 由 Intel 與 EP1SGX25DF800C5N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP1SGX25DF800C6N EP1SGX25DF800C5N
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Family Stratix GX Stratix GX
Logic Elements 25,560 LEs —
Maximum Transceiver Channels 20 channels —
Maximum Transceiver Data Rate 3.1875 Gbps 3.1875 Gbps per channel
封裝 FBGA-780 (FineLine BGA, 800-ball per JEDEC ordering code) FBGA-800 (FineLine BGA, 31x31 mm)
Process Node [DATA_NEEDED: process node] —
Core Voltage 1.5 V —
工作溫度 Commercial (0 C to +85 C) 0C to +85C (commercial)
Speed Grade 6 C5 (commercial)
Configuration Method Passive Serial / Passive Parallel / Active Serial / JTAG —
Transceiver Encoding 8B/10B —
Clock Data Recovery (CDR) Yes, integrated per channel —
記憶體類型 TriMatrix embedded SRAM —
DSP Blocks Yes, embedded multiplier blocks Embedded multiplier blocks (family-wide)
安裝類型 Surface Mount (BGA) Surface Mount (BGA)
RoHS 狀態 [DATA_NEEDED: RoHS status] —
Lead Free [DATA_NEEDED: lead free status] —
Device Logic Elements — 25,660 (typical)
Transceiver Channels — 8 (full-duplex)
Process Technology — 130 nm
Supply Voltage (Core) — 1.5 V typical
Lead-Free / RoHS Status — Lead-free (N suffix)
On-Chip Memory (TriMatrix) — Approx. 2 Mbits total
PLLs — Up to 40 (device-wide)
Embedded 8b/10b Encoder/Decoder — Yes (one per transceiver channel)
PCI Express Hard IP — x1, x4 endpoints supported
MSL 等級 — [DATA_NEEDED: MSL Level]
Development Software — Quartus II (legacy)

資料表與資源

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