EP20K600CF672C8N vs EP20K600CF672I8 比較

詳細並排比較 EP20K600CF672C8N 由 Intel 與 EP20K600CF672I8 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP20K600CF672C8N EP20K600CF672I8
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 啟用中 Obsolete
Device Type SPLD SPLD / FPGA
Product Type FPGA / programmable logic device —
Family APEX 20KC APEX 20KC
Nominal Gate Capacity 600K gates —
Logic Elements or Cells 24,320 —
Macros 2,432 —
User I/O Count 508 —
Package Terminals 652 pins —
封裝 BGA-652, 45 x 45 mm, 1.27 mm pitch —
Package Description 672-pin FC-FBGA —
供應電壓 1.8 V —
Listed Frequency 301.21 MHz —
Propagation Delay 1.48 ns —
Fabrication Process 0.15 µm —
工作溫度 0°C to 85°C 0 °C to +85 °C (Industrial)
Interconnect Metal All-layer copper metal —
I/O Configuration 508 user I/O —
安裝類型 Surface mount Surface Mount
RoHS 狀態 unknown Compliant per legacy product records
REACH Status unknown —
AEC-Q100 Qualification unknown —
Configuration Method [DATA_NEEDED: configuration memory and programming method] —
Core Current [DATA_NEEDED: core supply current] —
I/O Bank Voltage [DATA_NEEDED: supported I/O voltage range] —
Junction Temperature [DATA_NEEDED: maximum junction temperature] —
熱阻 [DATA_NEEDED: junction-to-ambient thermal resistance] —
Logic Elements / Cells — 24,320
Macros (Logic Cells) — 2432
Typical Gate Count — 600,000 gates
Embedded Memory — 311,296 bits
User I/Os — 488 to 508
腳位數 — 652 (functional) / 672 (BGA balls)
Propagation Delay (typical) — 1.48 ns
Internal Frequency (max) — [DATA_NEEDED: max internal frequency in MHz]
Core Supply Voltage — 1.8 V
Process Technology — 0.15 µm all-layer copper
Package Type — 672-ball BGA, 45 x 45 mm, 1.27 mm pitch
Configuration Interface — JTAG / Passive Serial
Design Tool — Quartus II (legacy MAX+PLUS II)

資料表與資源

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