EP20K60EFC144-2XN vs EP20K60EFI144-2X 比較
詳細並排比較 EP20K60EFC144-2XN 由 Altera 與 EP20K60EFI144-2X 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EP20K60EFC144-2XN - APEX-20KE FPGA 60K Gates 93 I/O 144-BGA | Intel/Altera
EP20K60EFC144-2XN Nrnd規格比較
| 參數 | EP20K60EFC144-2XN | EP20K60EFI144-2X |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | NRND |
| Series | APEX-20KE | — |
| Family | APEX-20K (MultiCore Architecture) | — |
| Typical Gate Count | 60,000 gates | — |
| Logic Elements / Embedded Array Blocks | 2,560 | — |
| Embedded Memory (Bits) | 32,768 | — |
| Maximum User I/O | 93 | — |
| Number of I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Core Supply Voltage (VCCINT) | 1.71 V to 1.89 V | 1.8 V (range 1.71 V to 1.89 V) |
| I/O Supply Voltage (VCCIO) | [DATA_NEEDED: VCCIO range] | — |
| Package Type | 144-BGA (Fine-pitch Ball Grid Array) | FBGA-144 (FineLine BGA, LBGA) |
| Package Code (per MPN suffix) | FBGA / LBGA, 13x13 mm | — |
| 安裝類型 | Surface Mount | Surface Mount |
| Operating Temperature (TJ) | 0 C to +85 C (commercial) | — |
| Speed Grade | -2 (per MPN suffix) | -2 (industrial, -2X suffix) |
| Configuration Method | JTAG (IEEE 1149.1), Passive Serial, Parallel | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Logic Family | CMOS, SRAM-based LUT | — |
| Device Family | — | APEX 20KE |
| Typical Gates | — | 60,000 |
| Logic Elements | — | 2,560 |
| Maximum Operating Frequency | — | 200 MHz |
| Process Technology | — | 0.22 µm CMOS |
| Propagation Delay (tpd) | — | 2.41 ns |
| User I/O Pins | — | 93 |
| Dedicated Inputs | — | 4 |
| Total Terminals | — | 144 |
| Package Code | — | LBGA |
| Terminal Form | — | Ball |
| Architecture | — | MultiCore (LUT + product-term + embedded memory) |
| I/O Standard Support | — | LVDS, 1.8 V I/O |
| 工作溫度 | — | -40 °C to +85 °C |
| Configuration Interface | — | JTAG (IEEE 1149.1) / serial PROM / parallel PROM |
| 濕度敏感等級 (MSL) | — | 3 |