EP3SE260H780C4LN vs EP3SE260H780C3N 比較

詳細並排比較 EP3SE260H780C4LN 由 Intel 與 EP3SE260H780C3N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Intel
EP3SE260H780C4LN EP3SE260H780C4LN - Stratix III E FPGA 255K LE 780-FCBGA | Intel

EP3SE260H780C4LN - Stratix III E FPGA 255K LE 780-FCBGA | Intel

EP3SE260H780C4LN ⚠ 最後購買機會

規格比較

參數 EP3SE260H780C4LN EP3SE260H780C3N
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 最後購買 啟用中
Family Stratix III E —
Logic Elements 255,000 —
Embedded Memory 16,672,768 bits (16.67 Mbit) —
Logic Array Blocks (LABs) 10,200 —
Embedded Multipliers (18x18) 384 —
User I/O Count 488 —
封裝 780-ball FCBGA (FineLine BGA) 780-BBGA, FCBGA (H780)
Speed Grade C4 (commercial, moderate speed) —
工作溫度 0C to +85C (commercial) 0 °C to +85 °C (C grade, commercial)
Core Voltage (VCC) 1.0 V —
I/O Voltage (VCCIO) 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V (bank-dependent) —
Auxiliary Voltage (VCCPD/VCCPT) 2.5 V / 3.0 V —
PLLs 8 —
Global Clock Networks 16 —
Process Node 40 nm TSMC —
Configuration Modes FPP, AS, PS, JTAG —
RoHS 狀態 Compliant Compliant (lead-free 'N' suffix)
MSL 等級 3 (168 hours) —
Series — Stratix® III E
Logic Elements (LE) — 255,000
Embedded Memory (bits) — 16,672,768
Number of LABs/CLBs — 10,200
User I/Os — 488
Number of Pins / Balls — 780
安裝類型 — Surface Mount
Process Technology — 40 nm CMOS
Maximum Core Frequency — [DATA_NEEDED: maximum core frequency MHz]
Supply Voltage (VCCINT) — [DATA_NEEDED: VCCINT nominal V]
Transceivers — [DATA_NEEDED: number of embedded transceivers and max data rate]
DSP Blocks — [DATA_NEEDED: number of DSP blocks and precision]
濕度敏感等級 (MSL) — [DATA_NEEDED: MSL level per JEDEC J-STD-020]
Configuration Method — SRAM-based, configured via JTAG / passive / active serial / fast passive parallel
Design Toolchain — Altera Quartus II (legacy); Intel Quartus Prime

資料表與資源

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