EP3SE260H780C4LN vs EP3SE260H780C3N مقایسه
مقایسه دقیق کنار به کنار EP3SE260H780C4LN توسط Intel و EP3SE260H780C3N توسط Intel. مشخصات کلیدی، پارامترهای الکتریکی، بسته‌بندی، وضعیت چرخه عمر، قیمت‌گذاری و موجودی را مقایسه کنید تا بهترین قطعه را برای نیازهای طراحی خود تعیین کنید.
Intel
EP3SE260H780C4LN - Stratix III E FPGA 255K LE 780-FCBGA | Intel
EP3SE260H780C4LN ⚠ آخرین فرصت خریدIntel
EP3SE260H780C3N - Stratix III E FPGA, 255K LE, 780-BGA | Intel / Altera
EP3SE260H780C3N ✓ فعالمقایسه مشخصات
| پارامتر | EP3SE260H780C4LN | EP3SE260H780C3N |
|---|---|---|
| برند | Intel | Intel |
| دسته‌بندی | FPGA & CPLD | FPGA & CPLD |
| وضعیت چرخه عمر | آخرین فرصت خرید | فعال |
| Family | Stratix III E | — |
| Logic Elements | 255,000 | — |
| Embedded Memory | 16,672,768 bits (16.67 Mbit) | — |
| Logic Array Blocks (LABs) | 10,200 | — |
| Embedded Multipliers (18x18) | 384 | — |
| User I/O Count | 488 | — |
| بسته‌بندی | 780-ball FCBGA (FineLine BGA) | 780-BBGA, FCBGA (H780) |
| Speed Grade | C4 (commercial, moderate speed) | — |
| دمای کاری | 0C to +85C (commercial) | 0 °C to +85 °C (C grade, commercial) |
| Core Voltage (VCC) | 1.0 V | — |
| I/O Voltage (VCCIO) | 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V (bank-dependent) | — |
| Auxiliary Voltage (VCCPD/VCCPT) | 2.5 V / 3.0 V | — |
| PLLs | 8 | — |
| Global Clock Networks | 16 | — |
| Process Node | 40 nm TSMC | — |
| Configuration Modes | FPP, AS, PS, JTAG | — |
| وضعیت RoHS | Compliant | Compliant (lead-free 'N' suffix) |
| سطح MSL | 3 (168 hours) | — |
| Series | — | Stratix® III E |
| Logic Elements (LE) | — | 255,000 |
| Embedded Memory (bits) | — | 16,672,768 |
| Number of LABs/CLBs | — | 10,200 |
| User I/Os | — | 488 |
| Number of Pins / Balls | — | 780 |
| نوع نصب | — | Surface Mount |
| Process Technology | — | 40 nm CMOS |
| Maximum Core Frequency | — | [DATA_NEEDED: maximum core frequency MHz] |
| Supply Voltage (VCCINT) | — | [DATA_NEEDED: VCCINT nominal V] |
| Transceivers | — | [DATA_NEEDED: number of embedded transceivers and max data rate] |
| DSP Blocks | — | [DATA_NEEDED: number of DSP blocks and precision] |
| سطح حساسیت به رطوبت (MSL) | — | [DATA_NEEDED: MSL level per JEDEC J-STD-020] |
| Configuration Method | — | SRAM-based, configured via JTAG / passive / active serial / fast passive parallel |
| Design Toolchain | — | Altera Quartus II (legacy); Intel Quartus Prime |