EPF8820ARC208-24 vs EPF8820ARC208-3 比較

詳細並排比較 EPF8820ARC208-24 由 Altera 與 EPF8820ARC208-3 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPF8820ARC208-24 EPF8820ARC208-3
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Family FLEX 8000 FLEX 8000 (EPF8820)
Usable Gates 8,000 8,000
Logic Cells 672 —
Logic Array Blocks (LABs) 48 —
User I/O Pins 152 —
Maximum Toggle Frequency 125 MHz —
Process Technology 0.42 µm CMOS SRAM 0.42 µm CMOS
Supply Voltage (VCC) 4.75 V to 5.25 V (5 V nominal) 4.75 V to 5.25 V
I/O Standards 3.3 V / 5.0 V MultiVolt I/O —
Speed Grade -24 —
Configuration Method Serial configuration device (EPC1/EPC1064/EPC1213/EPC1441), parallel EPROM, or JTAG —
In-Circuit Reconfigurability Yes (ICR) —
封裝 208-pin RQFP (exposed pad) —
工作溫度 [DATA_NEEDED: industrial/commercial range] —
RoHS 狀態 [DATA_NEEDED: not confirmed in datasheet] [DATA_NEEDED: RoHS status]
Lead-Free [DATA_NEEDED] —
Series — FLEX 8000
Logic Cells / Elements — 672
Registers — 152
Maximum Operating Frequency — 125 MHz
Configuration Memory — SRAM (volatile)
封裝 / 外殼 — 208-BFQFP Exposed Pad (208-RQFP, 28x28 mm)
Supplier Device Package — 208-RQFP (28x28)
安裝類型 — Surface Mount
Packaging — Tray
工作溫度範圍 — [DATA_NEEDED: operating temperature range]
In-Circuit Reconfigurability (ICR) — Yes (via external configuration devices)
Boundary-Scan Test — JTAG (IEEE 1149.1)
I/O Tolerance — 3.3 V / 5 V
Clock Networks — 4 dedicated low-skew global clocks
Lead-Free / Finish — [DATA_NEEDED: lead-free finish]

資料表與資源

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