EPM5032LC-20 vs EPM5032PC-20 比較
詳細並排比較 EPM5032LC-20 由 Altera 與 EPM5032PC-20 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5032LC-20 | EPM5032PC-20 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Device Family | MAX 5000 | MAX 5000 |
| Product Type | EPLD / CPLD (One-Time Programmable / UV-Erasable) | — |
| Usable Gates | 600 gates | 600 |
| Macrocells | 32 | 32 |
| Logic Blocks (LABs) | 1 | — |
| Speed Grade | -20 (20 ns pin-to-pin) | — |
| Maximum Frequency | 71.4 MHz | — |
| Propagation Delay (tPD) | 20 ns | 20 ns |
| Supply Voltage (VCC) | 5 V ±5% | 4.75 V to 5.25 V (nominal 5 V) |
| 工作溫度 | 0 °C to +70 °C (commercial; -55 °C to +125 °C military per /883B variants) | [DATA_NEEDED: operating temperature range] |
| Dedicated Inputs | 7 | 24 |
| Bidirectional I/O Pins | 16 | — |
| Total Inputs | 24 | — |
| Output Functions | 16 | — |
| Product Terms per Output | 16 | — |
| Programmable Interconnect | Programmable Interconnect Array (PIA) | — |
| 封裝 | LCC-28 (Plastic Leaded Chip Carrier, J-lead) | PDIP-28 (Plastic DIP, 28-pin) |
| 安裝類型 | Surface Mount | Through-Hole |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| MSL 等級 | [DATA_NEEDED: MSL] | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Programming Type | — | OTP (One-Time Programmable) |
| Logic Blocks | — | 2 Logic Array Blocks |
| Product Terms | — | 320 |
| Bidirectional I/O Lines | — | 16 |
| 最大時脈頻率 | — | 62.5 MHz |
| Technology | — | CMOS, 0.65 um process |
| Architecture | — | PAL-type macrocells with Programmable Interconnect Array (PIA) |