EPM5128GC vs EPM5128GC2 比較
詳細並排比較 EPM5128GC 由 Altera 與 EPM5128GC2 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5128GC | EPM5128GC2 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Macrocells | 128 | — |
| Usable Gates | 2,500 | 2.5K |
| Logic Elements / LABs | [DATA_NEEDED: LAB count] | — |
| User I/Os | 68 | — |
| Package Type | WPGA (Windowed Ceramic Pin Grid Array) | — |
| Package Code | WPGA | — |
| Number of Terminals | 68 | — |
| Terminal Form | PIN/PEG (through-hole PGA with alignment pegs) | — |
| Package Shape | Square | — |
| Temperature Grade | Commercial | — |
| Supply Voltage (Vcc) | 5 V | — |
| Process Technology | CMOS, UV-erasable | CMOS EPROM |
| Architecture | EPLD, programmable AND/OR array with fixed OR plane | AND/OR plane + programmable macro cell + PIA |
| Propagation Delay (tpd) | [DATA_NEEDED: tpd in ns] | — |
| Maximum Frequency (fmax) | [DATA_NEEDED: fmax in MHz] | — |
| Programmable Security Bit | Yes | — |
| Configuration Memory | Non-volatile UV-EPROM (windowed ceramic) | On-chip EPROM (no external boot device) |
| 安裝類型 | Through-Hole (PGA socket required) | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Macro Cells | — | 128 |
| Logic Array Blocks (LABs) | — | 8 (16 macro cells each) |
| Maximum Internal Frequency | — | 50 MHz |
| Supply Voltage VCC | — | 5 V |
| I/O Pins | — | 64 |
| Dedicated Inputs | — | 16 |
| 封裝 | — | Ceramic PGA (GC, windowed) |
| Programmable Flip-Flop Modes | — | D / T / JK / SR (selectable) |
| Reprogrammability | — | UV-erasable (windowed ceramic package) |
| 工作溫度 | — | [DATA_NEEDED: operating temperature range] |
| 腳位數 | — | [DATA_NEEDED: total PGA pin count] |