EPM9560RC208-21 vs EPM9560RC208-15 比較
詳細並排比較 EPM9560RC208-21 由 Intel 與 EPM9560RC208-15 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Intel
EPM9560RC208-21 - MAX 9000 CPLD, 560 Macrocells, 208-Pin RQFP | Intel (Altera)
EPM9560RC208-21 ⚠ 最後購買機會規格比較
| 參數 | EPM9560RC208-21 | EPM9560RC208-15 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Architecture | Multiple Array MatriX (MAX), third-generation | Third-generation Multiple Array MatriX (MAX) |
| Technology | CMOS EEPROM-based | — |
| Macrocells | 560 | — |
| Usable Gates | 12,000 | 12,000 gates |
| Logic Array Blocks (LABs) | 16 | — |
| Flip-Flops | 772 | — |
| Maximum User I/O | 149 | — |
| Propagation Delay (speed grade -21) | 21 ns (max, per speed grade designation) | — |
| 供應電壓 | 5.0 V | 5.0 V |
| I/O Voltage Tolerance | 3.3 V or 5 V (per variant) | — |
| In-System Programmability | Yes (IEEE Std. 1149.1 JTAG) | Yes, via IEEE Std. 1149.1 JTAG |
| 封裝 | 208-pin RQFP (Power Quad Flat Pack) | 208-pin RQFP (Power Quad Flat Pack) |
| 工作溫度 | [DATA_NEEDED: industrial or commercial grade -21 suffix] | [DATA_NEEDED: operating temperature range] |
| Configuration Memory | EEPROM (non-volatile) | — |
| Security Bit | Yes (programmable) | — |
| RoHS 狀態 | [DATA_NEEDED: confirm RoHS compliance for -21 variant] | [DATA_NEEDED: RoHS status] |
| Device Type | — | EEPROM-based Complex Programmable Logic Device (CPLD) |
| Macro Cells | — | 560 macro cells |
| Pin-to-Pin Delay | — | 15 ns |
| Counter Speed | — | 117.6 MHz |
| Configuration Technology | — | EEPROM (non-volatile) |
| 安裝類型 | — | Surface Mount |
| Number of I/O Pins | — | [DATA_NEEDED: number of I/O pins] |
| Logic Array Blocks | — | [DATA_NEEDED: number of logic array blocks] |
| Speed Grade | — | -15 (15 ns pin-to-pin) |