MM74C949N vs ADC0809CCN 比較
詳細並排比較 MM74C949N 由 Texas Instruments 與 ADC0809CCN 由 Texas Instruments. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | MM74C949N | ADC0809CCN |
|---|---|---|
| 品牌 | Texas Instruments | Texas Instruments |
| 類別 | ADC/DAC | ADC/DAC |
| 生命週期狀態 | Obsolete | 啟用中 |
| 解析度 | 8 bits | 8 bits |
| Number of Input Channels | 8 (single-ended, multiplexed) | — |
| Conversion Architecture | Successive Approximation (SAR) | — |
| Conversion Time | 116 microseconds (typical) | — |
| 供應電壓 | 5 V (single supply) | — |
| Analog Input Type | Single-ended, 8-channel MUX | — |
| Digital Interface | 8-bit microprocessor-compatible, tri-state outputs | — |
| 封裝 | 28-PDIP (Plastic DIP, 28-pin) | 28-pin PDIP (through-hole) |
| 工作溫度範圍 | -40 C to +85 C | — |
| Output Code | Binary (unipolar) | — |
| Technology | CMOS | — |
| Sample-and-Hold | Internal | — |
| Reference | Internal (external reference option [DATA_NEEDED: pin details]) | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status - legacy part predates RoHS directive; check distributor listings] | Compliant (NOPB variant); non-compliant legacy |
| 腳位數 | 28 | — |
| 安裝類型 | Through-Hole (DIP) | Through-Hole (DIP) |
| 生命週期狀態 | Obsolete / End of Life (per GlobalSpec listing) | — |
| Architecture | — | Successive Approximation (SAR) |
| Number of Channels | — | 8 single-ended |
| Sample Rate (max) | — | 10 kSPS |
| Input Type | — | Single-Ended, Multiplexed |
| Supply Voltage (VCC) | — | 4.5 V to 5.25 V (5 V typical) |
| 供應電流 | — | [DATA_NEEDED: typical quiescent current] |
| Analog Input Voltage Range | — | 0 V to VCC |
| Integral Nonlinearity (INL) | — | ±1 LSB max |
| Differential Nonlinearity (DNL) | — | ±1 LSB max (no missing codes) |
| Conversion Time (typ) | — | [DATA_NEEDED: at fCLK] |
| Clock Frequency | — | 10 kHz to 1.1 MHz |
| 參考電壓 | — | Internal 256R ladder, VREF+ / VREF- pins |
| Digital I/O Logic Level | — | TTL/CMOS compatible |
| 工作溫度 | — | -40 °C to +85 °C |
| Output Interface | — | 8-bit parallel, tri-state latched |
| Channel Selection | — | 3-bit address latch (A0/A1/A2) |