ATSAMD21J18A-CU - 256KB Flash 48MHz Cortex-M0+ MCU | Microchip
MPN： ATSAMD21J18A-CU ✓ 啟用中ATSAMD21J18A-CU 概覽
What is an ARM Cortex-M0+ microcontroller? An ARM Cortex-M0+ microcontroller is a 32-bit reduced instruction set computing (RISC) MCU implementing the ARMv6-M architecture; it sits in the hierarchy microcontroller -> 32-bit MCU -> embedded processor, with Cortex-M0+ being the smallest, lowest-power core in the ARM Cortex-M lineup. Microcontrollers in this class integrate Flash, SRAM, peripherals, and a CPU core into a single chip, targeting deterministic embedded control in cost- and power-constrained designs. The ATSAMD21J18A is part of Microchip's Atmel SMART SAM D family, designed for low-power connected embedded applications.
Key features of the ATSAMD21J18A-CU include 256 KB Flash with error correction, 32 KB SRAM, six SERCOM peripherals that can be mapped to almost any GPIO, a 12-channel 12-bit ADC with oversampling, a 10-bit DAC, and a capacitive touch hardware peripheral. The CPU is a 32-bit Cortex-M0+ with single-cycle hardware multiply, MPU, and Micro Trace Buffer support for debug, while the on-chip DFLL48M and fractional PLL enable precise 48 MHz operation from low-frequency crystal references.
Architecturally, the ATSAMD21J18A uses a low-leakage process with multiple power domains and idle/standoff/backup sleep modes reaching below 1 uA retention current. The peripheral event system allows hardware-triggered actions without CPU intervention, and the SERCOM channel architecture lets each instance be software-configured as UART, SPI, or I2C for flexible pin allocation.
Typical applications include home automation gateways, low-power wireless sensor nodes (e.g. LoRa/BLE host MCUs), USB HID devices, consumer electronics HMI, industrial metering, and battery-powered IoT endpoints. The USB PHY and SERCOM channels support direct USB device stacks without an external PHY, simplifying HID/CDC/Mass Storage product designs.
For design-in, plan the UFBGA-64 land pattern carefully - this 0.65 mm-pitch BGA requires NSMD pads, microvia fan-out, and careful reflow profiling to avoid tombstoning. Also confirm the chosen compiler toolchain (GCC arming-none-eabi, IAR, Keil) supports the Cortex-M0+ core with the SAM D21 device pack.
This page synthesizes distributor pricing, qualified drop-in alternatives, and engineering design notes beyond the manufacturer datasheet, giving procurement and design engineers a single source for selection, replacement, and BOM validation.
直接替換替代品，適用於 ATSAMD21J18A-CU — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號： ATSAMD21J18A-CU （相同外形與佔位） — 差異在於 Package, USB, Operating Temperature, ADC, DAC.
ATSAMD21J18A-AUT
✅ 直接替換聯絡詢價
查看資料表 →ATSAMD21J18A-AU
✅ 直接替換聯絡詢價
查看資料表 →ATSAMD21J17A-CUT
✅ 直接替換聯絡詢價
查看資料表 →ATSAMD21J17A-AUT
✅ 直接替換聯絡詢價
查看資料表 →ATSAMD21J17A-AF
✅ 直接替換聯絡詢價
查看資料表 →ATSAMD21J17D-MU
✅ 直接替換聯絡詢價
查看資料表 →ATSAMD21G18A-AF
✅ 直接替換聯絡詢價
查看資料表 →ATSAMD20J18A-AU
✅ 直接替換聯絡詢價
查看資料表 →ATSAMD21J18A-CU 最大額定值與電氣特性
| Core | ARM Cortex-M0+ (32-bit) |
| Maximum CPU Frequency | 48 MHz |
| CoreMark/MHz | 2.46 |
| Flash Memory | 256 KB |
| SRAM | 32 KB |
| Operating Voltage | 1.62 V to 3.6 V |
| 封裝 | 64-ball UFBGA (CU), 5x5 mm |
| SERCOM Channels | 6 (configurable as UART/SPI/I2C) |
| USB | USB 2.0 Full-Speed Device with on-chip PHY |
| ADC | 12-bit, up to 1 MSPS, up to 12 analog inputs |
| DAC | 10-bit, 1 channel |
| Timers/Counters | Up to 8 TC channels (24-bit), 3 TCC channels (16-bit) |
| I/O Pins | Up to 52 GPIO (depending on package) |
| 工作溫度 | -40C to +85C (Industrial / GREEN) |
| On-chip Oscillator | 48 MHz DFLL48M with PLL |
| 安裝類型 | Surface Mount (BGA) |
| RoHS 狀態 | Compliant (GREEN) |
| MSL 等級 | 3 (per JEDEC J-STD-020) |
ATSAMD21J18A-CU 腳位配置
| 腳位 A1 | VDDIO — I/O supply voltage (1.62 V to 3.6 V) |
| 腳位 A2 | PA02 — GPIO / ADC AIN0 (analog input) |
| 腳位 A3 | PA03 — GPIO / ADC AIN1 / VREFA |
| 腳位 A4 | PA04 — GPIO / ADC AIN2 / VREFB |
| 腳位 A5 | PA05 — GPIO / ADC AIN3 |
| 腳位 A6 | PA06 — GPIO / ADC AIN4 |
| 腳位 A7 | PA07 — GPIO / ADC AIN5 |
| 腳位 A8 | GND — Ground reference |
| 腳位 B1 | VBUS — USB VBUS sense (USB presence detect) |
| 腳位 B2 | PA08 — GPIO / SERCOM0 PAD0 (I2C/SPI/UART) |
| 腳位 B3 | PA09 — GPIO / SERCOM0 PAD1 |
| 腳位 B4 | PA10 — GPIO / SERCOM0 PAD2 |
| 腳位 B5 | PA11 — GPIO / SERCOM0 PAD3 |
| 腳位 B6 | PA12 — GPIO / SERCOM1 PAD0 |
| 腳位 B7 | PA13 — GPIO / SERCOM1 PAD1 |
| 腳位 B8 | PA14 — GPIO / SERCOM2 PAD0 / XIN (32.768 kHz crystal) |
| 腳位 C1 | DM — USB D- (full-speed data) |
| 腳位 C2 | PA00 — GPIO / SERCOM1 PAD0 / XOUT32 |
| 腳位 C3 | PA01 — GPIO / SERCOM1 PAD1 / XIN32 |
| 腳位 C4 | VDDANA — Analog supply voltage |
| 腳位 C5 | GNDANA — Analog ground reference |
| 腳位 C6 | PA15 — GPIO / SERCOM2 PAD1 / XOUT |
| 腳位 C7 | PA16 — GPIO / SERCOM1 PAD2 |
| 腳位 C8 | PA17 — GPIO / SERCOM1 PAD3 |
| 腳位 D1 | DP — USB D+ (full-speed data, 1.5 kohm pull-up to enable) |
| 腳位 D2 | PA18 — GPIO / SERCOM3 PAD0 |
| 腳位 D3 | PA19 — GPIO / SERCOM3 PAD1 |
| 腳位 D4 | PA20 — GPIO / SERCOM3 PAD2 |
| 腳位 D5 | PA21 — GPIO / SERCOM3 PAD3 |
| 腳位 D6 | PA22 — GPIO / SERCOM5 PAD0 / TC4 WO0 |
| 腳位 D7 | PA23 — GPIO / SERCOM5 PAD1 / TC4 WO1 |
| 腳位 D8 | PA24 — GPIO / SERCOM5 PAD2 / USB_OE (USB enable) |
| 腳位 E1 | PA25 — GPIO / SERCOM5 PAD3 / USB_VBUS |
| 腳位 E2 | PA26 — GPIO / SERCOM4 PAD0 |
| 腳位 E3 | PA27 — GPIO / SERCOM4 PAD1 |
| 腳位 E4 | PA28 — GPIO / SERCOM4 PAD2 / TCC0 WO0 |
| 腳位 E5 | PA29 — GPIO / SERCOM4 PAD3 / TCC0 WO1 |
| 腳位 E6 | PA30 — GPIO / TCC1 WO0 (SWD CLK) |
| 腳位 E7 | PA31 — GPIO / TCC1 WO1 (SWD DIO) |
| 腳位 E8 | NRST — External reset input, active-low |
| 腳位 F1 | PB00 — GPIO / SERCOM5 PAD2 |
| 腳位 F2 | PB01 — GPIO / SERCOM5 PAD3 |
| 腳位 F3 | PB02 — GPIO / SERCOM5 PAD0 / ADC AIN10 |
| 腳位 F4 | PB03 — GPIO / SERCOM5 PAD1 / ADC AIN11 |
| 腳位 F5 | PB04 — GPIO / SERCOM3 PAD0 / ADC AIN12 |
| 腳位 F6 | PB05 — GPIO / SERCOM3 PAD1 / ADC AIN13 |
| 腳位 F7 | PB06 — GPIO / SERCOM3 PAD2 / ADC AIN14 |
| 腳位 F8 | PB07 — GPIO / SERCOM3 PAD3 / ADC AIN15 |
| 腳位 G1 | PB08 — GPIO / SERCOM4 PAD0 / ADC AIN2 |
| 腳位 G2 | PB09 — GPIO / SERCOM4 PAD1 / ADC AIN3 |
| 腳位 G3 | PB10 — GPIO / SERCOM4 PAD2 / TCC0 WO4 |
| 腳位 G4 | PB11 — GPIO / SERCOM4 PAD3 / TCC0 WO5 |
| 腳位 G5 | PB12 — GPIO / SERCOM4 PAD0 / TCC1 WO0 |
| 腳位 G6 | PB13 — GPIO / SERCOM4 PAD1 / TCC1 WO1 |
| 腳位 G7 | PB14 — GPIO / SERCOM4 PAD2 / TCC2 WO0 |
| 腳位 G8 | PB15 — GPIO / SERCOM4 PAD3 / TCC2 WO1 |
| 腳位 H1 | GND — Ground reference |
| 腳位 H2 | VDDIO — I/O supply voltage (1.62 V to 3.6 V) |
| 腳位 H3 | PB16 — GPIO / SERCOM5 PAD0 |
| 腳位 H4 | PB17 — GPIO / SERCOM5 PAD1 |
| 腳位 H5 | PB18 — GPIO / SERCOM3 PAD0 |
| 腳位 H6 | PB19 — GPIO / SERCOM3 PAD1 |
| 腳位 H7 | PB20 — GPIO / SERCOM3 PAD2 |
| 腳位 H8 | PB21 — GPIO / SERCOM3 PAD3 |
典型應用
ATSAMD21J18A-CU 適用於 6 應用s: USB HID Consumer Device, Home Automation Gateway / IoT Node, Industrial Metering and Data Acquisition, Consumer HMI with Capacitive Touch, Wearable Fitness / Health Patch, Battery-Powered Sensor Logger.
USB HID Consumer Device
The ATSAMD21J18A-CU is ideal for USB HID devices such as keyboards, mice, gamepads, MIDI controllers, and custom HID input panels because the integrated USB 2.0 Full-Speed Device PHY eliminates an external chip and the 48 MHz Cortex-M0+ core runs USB stacks with comfortable headroom. At 2.46 CoreMark/MHz the part handles HID polling at 1000 Hz plus LED/PWM effects concurrently, and the SERCOM channels run I2C sensors or SPI displays over USB. Place a USBLC6-2SC6 ESD array on D+/D- with a 1.5 kohm pull-up on D+ to enumerate on a host port without external power. The BGA package keeps PCB area under 25 mm^2, enabling slim consumer peripherals, and 32 KB SRAM buffers HID report queues without jitter.
推薦
Home Automation Gateway / IoT Node
The ATSAMD21J18A-CU fits IoT gateway and sensor-node designs because six SERCOM channels support concurrent UART (Modbus/PM bus), SPI (LoRa/RF), and I2C (sensor) buses, while the 12-bit ADC reads analog sensors and the 10-bit DAC drives analog actuators. The Cortex-M0+ at 48 MHz with 256 KB Flash runs TLS/DTLS crypto for MQTT, Matter, or proprietary cloud protocols in RAM-constrained nodes. Sleepwalking peripherals let the MCU spend microseconds awake per event while the CPU sleeps under 1 uA, giving months of battery life from a CR123 cell. The UFBGA-64 package suits sealed IP67 outdoor enclosures where compactness matters; route SERCOM and ADC traces with ground keepouts for clean RF/sensor front-end measurements.
推薦
Industrial Metering and Data Acquisition
Industrial metering designs leverage the ATSAMD21J18A-CU because the 12-bit 1 MSPS ADC with 12 channels supports simultaneous voltage and current sensing in single-phase or three-phase energy meters, with the DMA-fed ADC doing continuous conversion while the CPU computes RMS, power factor, and harmonic distortion. The 32 KB SRAM holds rolling buffer of 1024 ADC samples (12-bit = 2 KB) without CPU load, and 256 KB Flash fits EN50470 metering libraries plus secure bootloaders. The 1.62-3.6 V supply tolerates wide-input DC/DC converter outputs typical in smart meters, while the industrial -40 to +85 C operating range covers outdoor cabinets. Compared with discrete ADC + MCU, the SAM D21 single-chip solution reduces BOM and board area by ~60 percent.
推薦
Consumer HMI with Capacitive Touch
The ATSAMD21J18A-CU is a strong fit for capacitive-touch HMI products such as smart thermostats, induction cooktop keypads, and appliance control panels because Microchip's built-in PTC peripheral scans up to 256 touch channels via the SERCOM/I/O infrastructure without an external touch controller. The Cortex-M0+ cycles through self-cap and mutual-cap scans while running GUI logic on a small SPI TFT (e.g. ST7789). The 256 KB Flash stores fonts, images (compressed in RAM), and gesture libraries, and 32 KB SRAM keeps the framebuffer for 160x128 color LCDs at 16 bpp. The UFBGA-64 fits behind the touch glass with minimal stack height, supporting modern bezel-less appliance designs.
推薦
Wearable Fitness / Health Patch
Wearable health patches and fitness trackers benefit from the ATSAMD21J18A-CU because its idle/standby current under 1 uA preserves weeks of battery life on a 70 mAh coin cell, and the on-chip 10-bit DAC plus I2S audio interface supports biosignal audio playback. Six SERCOM channels run simultaneously - BLE over UART/SPI, optical heart-rate sensor over I2C, IMU over SPI, and accelerometer interrupt. 32 KB SRAM caches biometric samples between BLE events, while 256 KB Flash stores firmware, DSP libraries, and ML inference models for step/sleep detection. The BGA package supports 5x5 mm PCBs ideal for behind-the-ear patches and wristband modules.
推薦
Battery-Powered Sensor Logger
Battery-powered data loggers for environmental, structural-health, and remote-asset monitoring use the ATSAMD21J18A-CU for its RTC calendar mode below 1.5 uA plus DFLL48M wake-from-sleep in microseconds. The 12-bit ADC samples sensors on a programmable interval (every second to every hour), stores results in 32 KB SRAM, and bursts them via UART/SPI to an attached radio or SD card. The 256 KB Flash retains weeks of circular-log history at 1 sample/minute, and ECC prevents bit flips from radiation or thermal stress in outdoor installations. The wide 1.62-3.6 V supply lets the same design run from a single CR2032 or 2x AA cells without level shifters.
推薦
推薦產品摘要
工程參考資料，適用於 ATSAMD21J18A-CU — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | ATSAMD21J18A-AUT | ATSAMD21J18A-AU | ATSAMD21J17A-CUT | ATSAMD21G18A-AF | ATSAMD20J18A-AU |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 64-ball UFBGA (CU) 5x5 mm | TQFP-64 10x10 mm - different land pattern | TQFP-64 10x10 mm - different land pattern | 64-ball UFBGA - same footprint | TQFP-64 - different land pattern | TQFP-64 - different land pattern |
| Core | ARM Cortex-M0+ 32-bit | ARM Cortex-M0+ 32-bit | ARM Cortex-M0+ 32-bit | ARM Cortex-M0+ 32-bit | ARM Cortex-M0+ 32-bit | ARM Cortex-M0+ 32-bit |
| Max CPU Frequency | 48 MHz | 48 MHz | 48 MHz | 48 MHz | 48 MHz | 48 MHz |
| Flash Memory | 256 KB | 256 KB | 256 KB | 128 KB | 256 KB | 256 KB |
| SRAM | 32 KB | 32 KB | 32 KB | 16 KB | 32 KB | 32 KB |
| USB PHY | USB 2.0 Full-Speed Device | USB 2.0 Full-Speed Device | USB 2.0 Full-Speed Device | USB 2.0 Full-Speed Device | USB 2.0 Full-Speed Device | None (no USB PHY) |
| GPIO Count (max) | 52 | 52 | 52 | 52 | 38 | 52 |
| Operating Temperature | -40C to +85C (Industrial) | -40C to +85C (Industrial) | -40C to +85C (Industrial) | -40C to +85C (Industrial) | -40C to +85C (Industrial) | -40C to +85C (Industrial) |
主要差異化特點
- USB 2.0 Full-Speed on-chip PHY saves external chip cost (對比ATSAMD20J18A-AU)
- Higher GPIO count (52 vs 38) for expanded sensor/HMI boards (對比ATSAMD21G18A-AF)
- Same SAM D21 silicon in compact 5x5 mm UFBGA-64 footprint (對比ATSAMD21J18A-MUT (QFN-64))
- Larger Flash (256 KB vs 128 KB) reduces need for external SPI flash (對比ATSAMD21J17A-CUT)
設計說明
The UFBGA-64 package on ATSAMD21J18A-CU uses a 0.5 mm ball pitch and requires non-solder-mask-defined (NSMD) pads per IPC-7352 with a 0.25-0.30 mm pad diameter. Use microvia (0.1 mm laser via) fan-out to break out the inner balls to escape routes on a 4-layer PCB with a solid ground plane under the BGA. Reflow profile must conform to JEDEC J-STD-020 MSL-3, with peak temp 245-260C for no-clean SAC305 paste; verify profile with a thermocouple on a BGA ball at the package center. Tombstoning risk for adjacent small components (0402/0201) requires balanced copper area on opposite sides of the BGA footprint to equalize thermal mass during reflow.
Place a 1 uF X7R 0402 ceramic bulk capacitor within 5 mm of each VDDIO ball and a 0.1 uF X7R 0402 within 2 mm for high-frequency decoupling. The VDDANA rail (used for ADC/DAC) should be fed from a ferrite bead or filter from VDDIO plus a 1 uF + 10 nF cap stack to reduce ADC noise injection; according to Microchip's SAM D21 datasheet, a clean VDDANA improves ADC ENOB by 0.5-1.0 bit at full sampling rate. Use a separate analog ground island connected at a single point to digital ground to avoid ground-loop noise.
Route the USB D+ and D- traces as a 90 ohm differential pair with no stubs and no via jogs, keeping total length under 50 mm and matching length to within 0.5 mm to pass USB compliance. Per the SAM D21 datasheet, place the 1.5 kohm pull-up resistor on D+ within 12 mm of the DP ball and keep it close to the device to avoid radiating 12 MHz harmonics. Add a common-mode choke (e.g. ACM2012-900-2P) at the USB connector end for EMI suppression in consumer products.
Estimated: at 48 MHz active mode, VDDCORE current ~3.0 mA from 1.62 V supply, the ATSAMD21J18A-CU dissipates roughly 5 mW in ACTIVE mode and < 1 uA in STANDBY retention. The UFBGA-64 package has a typical theta_JA of 30-35 C/W on a 4-layer 1 oz JEDEC test board, meaning junction temperature rises < 1 C above ambient at full CPU load - well within the industrial 85 C rating with no thermal relief. Hot spots only matter in USB VBUS-powered designs where upstream regulator self-heating dominates.
Do not rely on the internal 8 MHz oscillator for USB communication; the SAM D21 datasheet requires the DFLL48M closed loop with a 32.768 kHz crystal reference to achieve the USB 480 MHz clock accuracy. If your design leaves XIN32/XOUT32 floating, USB enumeration will fail intermittently. Also, configuring the NVMCTRL to 1 wait-state at 48 MHz is mandatory; running at 0 wait-state corrupts Flash reads. Finally, set the BOD33 threshold to 3.0 V or higher if your supply rail droops under load - the default 1.62 V BOD33 is too low for most USB applications.
合規資訊
GREEN designation per Microchip product page (RoHS / REACH / halogen-free). Not AEC-Q100 qualified - automotive applications should use the ATSAMD21J18A-AUT or -AUT variant. JEDEC J-STD-020 MSL-3 moisture sensitivity applies.
